Technology News
06/01/1999
Int`l Sematech, Hitachi plan broad 300mm effort
In one of its broadest equipment development programs to date, and perhaps its largest with a Japanese company, International Sematech will work with Hitachi Ltd. on a 27-month effort to accelerate development of Hitachi`s 300mm etchers, CD-SEMs, wafer inspection, defect analysis, and waste abatement equipment. The program will also provide test material for 0.13?m and 0.10?m development at International Sematech member companies, and assistance for advanced tool development at other equipment companies.
International Sematech approached Hitachi about the program following Hitachi`s successful completion of an International 300mm Initiative demonstration of an oxide/poly etch tool, said marketing manager Jim Manos.
Ed Akers, director of 300mm manufacturing and logistics at International Sematech, said one of the drivers for the project is a long-standing Sematech policy of trying to ensure at least two strong suppliers of each type of process equipment. "Hitachi fits very well - they have a good position in other countries, and are very viable," said Akers. "We can`t go looking for a secondary company that couldn`t respond to member company needs."
Equipment is slated to start arriving at International Sematech`s Austin, TX, facility in the August/September time frame, said Akers. Data and other accomplishments should start coming out by mid-2000.
Several "bridge" tools, capable of 200mm and 300mm operation, are included. Akers noted that plans call for at least one system to start operation at 300mm, be converted to 200mm, and then back again in order to process "test wafers with some newer films that aren`t available at 300mm." - P.D.
Nanomolding: A submicron lithography alternative
Imagine using a rubber stamp to fabricate optical communications devices and plastic transistors with the smallest features yet. It`s possible with a new technology from Lucent Technologies` Bell Labs.
The new technology, dubbed nanomolding, involves making reusable rubber stamps with features that are as small as those possible at the limit of conventional semiconductor fabrication; the stamps are made by pouring liquid rubber onto a prototype device made of patterned silicon. The rubber solidifies and is peeled away from the silicon, creating a perfect reproduction of the microscopic silicon relief pattern. In addition, the development of nanomolding comes as its close cousin, so-called step-and-flash lithography, has been proposed for a next generation technology in semiconductor manufacturing.
Bell Labs chemist John Rogers says, "Techniques that use these rubber stamps and molds provide simple, low-cost alternatives to conventional lithography. This technique may lead to novel applications because we can now print features on rough or curved surfaces, such as optical fibers, and on materials that are incompatible with standard lithographic techniques."
To make plastic transistors, Rogers and his colleagues inked a rubber stamp pattern with an organic ink. They then stamped a gold-coated plastic film and etched away the unprinted area of the gold, leaving high-resolution circuit patterns. Next, they stripped away the ink with ultraviolet light, exposing the underlying gold, and deposited organic semiconductor material on the gold pattern. The result was functional plastic circuits with features as small as 0.2?m.
Rogers` team has created resonators for plastic-based lasers that could potentially be used in optical communications. For this they used a flat rubber stamp with a series of raised lines only 0.3?m wide to define lines of gold on plastic. They then etched away the regions not protected by the gold, creating surface-relief, resonator structures with the desired pattern. "These lasers had operating characteristics that were nearly identical to those produced by lasers manufactured with high-resolution photo lithography," Rogers said.
In another demonstration of nanomolding, Rogers stamped microcoils on optical fibers by rolling the fiber over a rubber stamp with raised lines. By flowing current through the microcoils - hundreds of turns/centimeter of fiber - it is possible to dynamically tune the optical characteristics of the fiber, a potentially important capability for future high-capacity optical networks that may demand more than simple passive elements within the fiber. - P.B.
Nanomachining repair tools coming for masks
Rave LLC, a startup firm in San Jose, CA, has received International Sematech funding to develop an advanced photomask repair tool based on nanomachining technology.
The Rave system, known as the nm1300, will be targeted at the 130nm design rule generation of masks, and will be capable of subtractive repair on a variety of materials including chrome, quartz, and many metal films, said CEO Barry Hopkins. The system will be able to make repairs on the nanometer level, said Hopkins, with possible future extension to the angstrom range; wafer-level applications may be added to mask uses down the road.
Hopkins declined to reveal details of the technology used in the system. "We`re trying not to oversell it, and there`s a lot of patent application activity," he said. The company expects to start presenting papers on its methodology, including the removal of debris generated during nanomachining, late this year.
Company officials hope to open a lab for customer testing by the end of the year, produce a beta machine in 2000, and begin production in late 2000 or early 2001. List price is expected to be in the $3 million to $3.5 million range.
In addition to an undisclosed amount of funding from International Sematech`s lithography program, Rave has received private funding from founders and outside investors.
International Sematech`s funding "is a pretty clear indication of the industry`s dissatisfaction" with the current mask repair situation, said Hopkins. "The existing ion beam and laser ablation techniques begin to run out of gas at 0.25 micron, and hit the wall at 0.18 micron." At 130nm design rules, he noted, "you have to work on image capture and material removal in the 50nm range." The Rave machine is currently working in the "tens of nanometers" range, he said. - P.D.
TRW delivers EUV source; 2nd generation due in 2000
Looking ever further to the future, TRW Inc., Redondo Beach, CA, has delivered an EUV light source to the US EUV LLC development organization, and intends to commercialize the design for market sales.
"The first step is to deliver the laser, demonstrate EUV production, and integrate it into the engineering test bed at the EUV LLC," said John Chang, TRW advanced systems manager for commercial lasers. Supply of beta and qualification units will follow. A full demo is to take place by December; a second-generation design is planned for early 2000.
Chang said TRW will supply lasers to SVG Lithography for its EUV exposure tool program, which will start taking orders late this year. "Given positive results, about 18 months from that we have to be ready to take production orders," said Chang. Deliveries could begin in late 2002 or early 2003. - P.D.
Gd oxide may bring better GaAs, more talk
Just when you thought everyone was already talking enough on cell phones, Bell Labs researchers have developed a process that is expected lead to an improved class of GaAs transistors and, indirectly, to longer talk times on cellular phones. These researchers have solved the 35-year-old mystery of how to grow a commercially viable oxide on gallium arsenide (GaAs); it`s a single crystal of gadolinium (Gd) oxide.
Most wireless applications use GaAs metal-semiconductor field-effect transistors (MESFETs). They lack a gate oxide, but are necessary because they attain higher frequencies compared to silicon. Without the insulating gate oxide layer, these transistors are always "on," which limits talk time on cellular phones and operating time of wireless base stations.
While Bell Labs researchers have developed functional GaAs metal oxide semiconductor field effect transistors (MOSFETs) with a gate oxide mixture of Ga and Gd oxides, straight Gd oxide crystal yields superior performance and is easier to fabricate. The researchers create the molecular layer on the GaAs surface with molecular beam epitaxy.
"The gate oxide was the last castle to conquer in the GaAs kingdom," says physicist Refik Kortan of Bell Labs, the R&D arm of Lucent Technologies. Kortan and his colleagues described their research results in the March 19, 1999 issue of Science.
Growing a complicated single-crystal gate oxide on GaAs was unexpected. "You would not expect two vastly different materials to have strong, complete bonds and a defect-free interface," said Bell Labs materials scientist Minghwei Hong. "We now are investigating why it happens." Besides Kortan and Hong, the research team included Raynien Kwo, Joe Mannaerts, and Mike Sergent.
- P.B.
Process unknowns can't hide from Kohonen
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Artificial neural networks, specifically the application of Kohonen mapping, can be used to extract differences in wafer processing not detected with electrical test (E-test). Kohonen mapping has been used in other industries, but so far is relatively unknown in wafer processing. According to Jerry Secrest of Secrest Research, Portola Valley, CA (www.secrestresearch.com), "The value of this method is its potential to detect maverick lots, wafers and die, and its ability to detect shifts in processing, differences in so-called identical processes, or to compare silicon foundries, without even knowing what you are looking for." A Kohonen map is a so-called self-organizing map developed by Teuvo Kohonen (Self-Organization and Associative Memory, Springer-Verlag, Berlin, 3rd edition, 1989). The technique has been implemented in a commercial software package from NEUSciences (www.neusciences.com).
Briefly described, a Kohonen network has two layers of neurons: an input layer and a "competitive Kohonen" output layer. A Kohonen network discovers similarities in data presented to it and groups similar data samples together on a two dimensional grid. The network is capable of reducing a multidimensional problem, such as the interrelationships of E-test values, while maintaining relationships and structure present in the data. The network is not primed with any information about relationships in the data, but discovers them during its "unsupervised" training. Networks are trained on normal conditions and then used to sort through samples to look for unusual conditions that will clearly show up elsewhere on the map.
In a demonstration of the capabilities of Kohonen mapping, Secrest took E-test results from 150 wafer lots from one fab that seemingly had received consistent processing over three months. The E-test data included transistor gain, base and pinched-base sheet resistances, junction breakdown voltage, junction forward voltage drop, epi and buried layer resistances, saturation voltage drop, and isolation breakdown. "A visual review of E-test values in a spreadsheet did not indicate any divisions in the values that would indicate a difference in processing," he says. While no preprocessing of the data was needed or done, two lots were removed because they had missing data.
Secrest used this data to "train" a Kohonen network that revealed three clusters of lot characteristics (see figure). "These different characteristics would have been very difficult if not impossible to find in a reasonable time using statistical methods," he says. Kohonen clustering uses all available parametric measurements. The illustration shown is 2D with each lot represented by a dot. Lots near each other in the clusters have similar characteristics. The end result of Kohonen mapping is a spreadsheet that reveals each lot`s "distance" from the center of its cluster and from other clusters, facilitating separation of lots for engineering evaluation or product testing.
Secrest says, "The results show that although the processing appears to be very close when each E-test parameter is examined on its own, Kohonen networks can be used to find novelty lots and differences in processing from otherwise undetected changes in fabs." - P.B.
Bell Lab physicists watch oxide grow
Using a novel technique, physicists at Lucent Technologies` Bell Labs have uncovered the nature of the defects that allow "electron escape routes" through very thin gate oxide layers in ICs. Yves Chabal, and colleagues Marcus Weldon and Kate Queeney, devised a method to grow silicon dioxide slowly - one fractional atomic layer at a time - watching the growth every step of the way. They accomplished this by causing silicon and water to react under ultra-high vacuum conditions, followed by ultra-slow oxidation at room temperature.
The researchers combined infrared spectroscopy with state-of-the-art calculations provided by Krishnan Ragha vachari to determine which atoms were present and how they ultimately joined together to form a continuous film.
"The results showed how silicon and oxygen occasionally come together in unconventional ways, leading to the formation of microscopic defects," Chabal said. For example, Chabal`s group saw how two silicon atoms joined together in certain locations, where silicon and oxygen should have come together.
"The goal is using this new understanding to minimize defect formation in the manufacturing process," Chabal said, "so it can be possible to create ultra-thin gate oxides that are free from defects. The discovery could lead to improved insulating layers for smaller and faster transistors." -P.B.
Sumitomo, Mitsubishi begin 300mm joint venture
Sumitomo Metal Industries, Osaka, and Mitsubishi Materials Corp., Tokyo, are forming a new joint venture company to develop and manufacture 300mm silicon wafers, with work beginning this July.
The deal marks the first such joint effort between the two companies, and is seen as a possible first step in a more formal merging of the firms` entire silicon wafer businesses - a move which would rival competitor SEH`s leadership position in the wafer market.
Sumitomo Metal (formerly known as Sumitomo Sitix) and Mitsubishi Materials Silicon, the silicon manufacturing arm for Mitsubishi Materials, will each transfer existing 300mm development and pilot production divisions to the new joint venture, which will manage the 300mm businesses. The joint venture will be capitalized at ?500 million (about US$4.2 million); an expected ?60 billion to ?70 billion in new plant investments will be shared by the two firms. R&D expenses will also be split between the companies.
Today, the two firms have a total 300mm manufacturing capacity of 15,000 wafers/month, but plans under the joint venture call for a new 300mm volume manufacturing plant with a capacity of 100,000 wafers/month to be established around 2002.
Super-cooled, neutral atoms to replace ransistors, someday
Poul Jessen envisions that super-cooled neutral atoms in a "quantum mechanical computer" will be used when transistor-based binary-computing hits its limit. Jessen, assistant professor of optical sciences at the University of Arizona (UA) in Tucson, says, "In fifty years, quantum information may be the new paradigm for information processing. There are no fundamental laws that says this cannot be done."
Jessen is a former student of William Phillips, who is the recipient of the 1997 Nobel Prize for his work in laser cooling. Now, Jensen heads one of the most active groups in the US, at the UA Optical Sciences Center, studying optical lattices or standing waves of light that trap and control single atoms. This group, in collaboration with colleagues at the University of New Mexico, has begun experiments to test theories that neutral or chargeless atoms, trapped like individual eggs in an egg carton by a lattice created by interfering laser beams and super-cooled to the point of zero motion, will work for quantum computing.
The group has succeeded in cooling light-trapped atoms to the zero point of motion, a crucial pure vibrational state and the logical zero for a quantum mechanical computer. "Cooling atoms is no small achievement," says Jensen. "These atoms are colder than liquid helium by roughly the same factor that liquid helium is colder than the center of the sun."
Jessen`s scheme involves stacking atom-filled optical lattices so neutral atoms will sufficiently interact to make logic operations possible. "If the scheme works, the big advantage is that atoms can be easily accessible for laser manipulation, but remain isolated from the surrounding environment. Random outside forces that act on tiny quantum bits is perhaps the greatest problem to confront when trying to build a real quantum computer," Jessen says.
"A quantum computer, very loosely speaking, would allow you to enter all possible inputs at one time and perform all the corresponding computations in parallel," notes Jessen. "However, this is a very simplistic way of putting it. The laws of quantum physics only allow you to observe one of the many possible outputs each time you run the computer, so you have to be very clever about how you look at the results."
Researchers have discovered that several classes of computational problems can be solved in ways that take advantage of quantum parallelism. How powerful is it? A quantum computer would simultaneously carry out a number of computations equal to two to the power of the number of input bits. In other words, if you were to feed a modest
100 bits of information into such a computer, the machine would process in parallel 2100 different inputs simultaneously. The higher the number of bits fed into such a computer, the exponentially greater advantage a quantum mechanical computer has over a classical computer.
One of the driving motivations for developing a quantum mechanical computer is that it can be used to crack secret codes or communicate information more securely. For example, a quantum mechanical computer could crack a code encrypted for security with a 200 digit number, a problem that would take classical computers the age of the universe to solve. So, this computer could also send information that is fundamentally impossible to decode by anyone other than the intended recipient.
Jessen confesses, "It`s important to be honest and say that physicists and computational scientists are far from done with the study of quantum information. It`s not yet known what kinds of problems such computers might do better than a classical computer." -P.B.
TECH BRIEFS
Two Texas A&M University researchers will share a $5000 cash award from the Semiconductor Safety Association, International Sematech, and the Semiconductor Research Corporation for coming up with a method for effective destruction and removal of PFC emissions from semiconductor etch processes with greater than 99.9% efficiency. The technology, developed by researchers John Bevan and Christopher Hartz, along with Rf Environmental Systems, Seabrook, TX, exploits nonequilibrium microwave-generated plasmas to achieve PFC emission reduction; it is expected to be commercially available soon.
Japan`s Selete research consortium, in conjunction with the Tokyo Institute of Technology, has developed a new material for use in 157nm photomasks. The fluorinated anhydrous silica glass has been used in optical fibers, according to the Nikkei Industrial Daily. It is said to have initial transmissivity of 80%, and is not altered by exposure to light from the fluorine excimer lasers used to produce 157nm light. Mask materials have been seen as one of the stumbling blocks in the move towards 157nm; work in the US has produced fluorine-doped and dry fused silica reticle materials with 60-80% transmissivity.
Ball Semiconductor, Allen, TX, has unveiled its first spherical semiconductor, a 5?m NMOS inverter built on a 1mm sphere. "Until now, we have proven such basic technologies as chemical vapor deposition, spherical lithography, and etching individually, but the NMOS spherical semiconductor brings these processes together," said CEO Akira Ishikawa. A pilot line in envisioned running in late 2Q.