100-nm contract holes with KrF lithography
03/01/1999
100-nm contact holes with KrF lithography
Engineers at Mitsubishi Electric Corp.`s Advanced Technology R&D Center in Hyogo, Japan, have developed a practical process that yields 100-nm contact holes with KrF-based lithography. It`s dubbed RELACS for resolution enhancement lithography assisted by chemical shrink.
While several such approaches have been proposed by various researchers over the past few years, RELACS is attractive because of its simplicity, low cost, and robustness (see figure on p. 26). The process involves:
using KrF lithography to expose and develop 220-nm hole patterns in a chemically amplified resist,
overcoating the developed hole pattern with the "RELACS agent,"
baking at 110?C to form a water-insoluble layer along the resist pattern surface by crosslinking with acid in the resist, and
rinsing with water to remove noncrosslinked material, thereby leaving a "shrunk hole" pattern.
The actual composition of the agent has not been released. Mitsubishi engineers will only say "it is a water-based solution, which makes the process environmentally friendly."
Reporting to attendees of IEDM 1998, Toshiyuki Toyoshima of the technical staff of Mitsubishi`s R&D Center said, "While the resulting holes were slightly tapered, they did duplicate the initial hole shape well with sufficient homogeneity and no cracks or defects, and without any RELACS agent residue. The shrunk-hole pattern was transferred accurately to the underlying silicon oxide by plasma etching."
0.1-0.6-?m bump defects in an OPC pattern. 0.1- and 0.2-?m bumps did not cause printing defects; 0.3-0.5-?m defects show some variation; and a 0.6-?m bump caused a serious short.
The baking step is a key to process success and provides shrunk-hole diameter control. "We observed an almost linear relationship between shrinkage and baking temperature: a 220-nm initial hole pattern shrunk to 106 nm after the baking at 113?C and to 96 nm at 115?C," Toyoshima said. Conversely, baking time had a small effect on shrinkage.
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From work at Mitsubishi, Toyoshima and others have determined critical dimension (CD) deviation (3s) at 23 nm before and 19 nm after RELACS. He says, "This result implies that RELACS treatment improves initial hole CD deviation. We found this was due to a `size effect` where a thicker wall forms (that is, more hole shrinkage) with larger initial hole sizes; this was an almost linear relationship."
The Mitsubishi team has also applied the RELACS process to isolated resist patterns, with similar results and good uniformity on 200-mm wafers. "We are convinced that our RELACS process is applicable for 100-nm level patterns without a self-alignment process. Our plans are to introduce it into production for
200-nm-level devices." - P.B.