Are roadmap two-year cycles achievable?

02/01/1999

Are roadmap two-year cycles achievable?

One of the clearest trends in chipmaking over the last few years has been the increasing rate of design rule shrinkage. Quarter-micron production began in 1997, and manufacturers rapidly went to 0.23, 0.21, and 0.2 ?m, with 0.18 planned for many fabs in the first half of 1999 - a two-year generational cycle.

Data from the International Roadmap Coordinating Committee, which is seeking to extend the SIA`s roadmap and develop a global consensus on how semiconductor technology will evolve over the next dozen years, was presented in a set of proposed roadmap revisions. A 1998 revision includes modest reductions in the expected design rule for the next six generations, but no changes in the years of expected arrival. The proposed 1999 revision extrapolated the two-year cycle into the future, suggesting that 127-nm design rules could be in production in 2001, with 90 nm following in 2003 (see table). The timelines were reportedly developed at a meeting at SEMICON Japan. The two-year concept is reportedly only a draft, and has not been approved by the roadmapping committee.

From today`s perspective, it appears barely plausible that 127-nm lithography technology (likely at the 193-nm wavelength) could be in place by 2001, and seemingly impossible that 90-nm features (probably at 157 nm) could be produced just four years out. Even if lithography capabilities were available, the myriad needs for new interconnects, ultra-thin gate oxides, and other advances would likely prove insurmountable. Moreover, chipmakers` ability to earn return on investment would seem limited in a two-year model.

One of the drivers behind what one observer called the "institutionalization of the accelerated shrink" is reported concern about the viability of adopting larger die sizes, due to defect densities. Since larger dies are the prime mover behind the advent of 300-mm wafers, the schedule outlined by the international roadmappers would likely place a further damper on the larger wafers` arrival. - P.N.D.