Next-generation litho is the focus of Belgium conference

01/01/1999

Next-generation litho is the focus of Belgium conference

None of the post-optical next-generation lithography (NGL) technologies appears sufficiently more persuasive than others to warrant full industry commitment, but all of them probably deserve more academic attention. This was the focus of the Micro- and Nanoengineering 98 Conference held in Leuven, Belgium.

Sandip Tiwari of the IBM Research Division (Watson Lab) predicted that CMOS circuits could be scaled to 10-nm dimensions, if such innovations as dual metal gates and multilayer thin oxides were adopted. However, because of leakage currents, the need for unique structures, and other technical problems, Tiwari contended, "DRAM doesn`t lend itself to small dimensions." That left ultra-high speed ASICs and MPUs as potential driver technologies.

Bill Arnold of ASML Lithography reviewed the history of optical projection lithography from the Philips SIRE-I wafer stepper in 1974 through a 25,000 fold productivity increase (accompanied by a

25? price increase) to today`s high-throughput exposure tools. Arnold foresaw further innovations, including

157-nm exposure tools for 70-nm production and field-stitching to allow large chips to be produced using small exposure fields.

Lithography highlights of the conference included a prediction that alternating phase-shifting masks would prove more cost-effective than spacer-gate technology for future device generations, and two papers on the complexities of lithography over inorganic bottom antireflection layers. When 1% reflectivity is too much, F. Zhang and his co-workers from IMEC recommended using both top and bottom ARCs. Carbon nanotube FETs and biological applications of microtechnology highlighted the first nanoscale engineering sessions.

Several papers covered various aspects of the Lucent Technologies SCALPEL (scattering with angular limitation projection electron lithography) system including masks (which need more conductivity), proximity correction, and thermal effects at the wafer. While challenges remain, including finding a fast resist with zero outgassing even during exposure, Lloyd Herriott of Lucent expressed confidence that SCALPEL would prove viable for manufacturing. "It is not interesting if it cannot do high throughput!" he said.

Rich Stulen, the leader of the EUV R&D effort at Sandia National Laboratories, Livermore, CA, outlined the progress and challenges in developing that type of next-generation lithography. The EUV engineering test stand system is now expected to expose 10, 300-mm wafers/hr using 11.7-nm radiation. To obtain 150 mW/cm2 EUV flux at the wafer requires so much radiation that active thermal management will have to be engineered into the mask cell and other components.

B.S. Bollepalli and F. Cerrina of the University of Wisconsin presented calculations indicating a 5% CD shift of images reflected by the masks in the current nontelecentric EUV exposure-tool designs. - M.D.L.