Through the looking glass

11/01/1996

Through the looking glass

When Alice stepped through the looking glass, she found herself in a strange land where the assumptions and conventions of her own world no longer applied. Like Alice`s looking glass, the polished planar surface of a silicon wafer has historically separated the "worlds" of doping (i.e. implantation) and deposition (i.e. PVD). Simply put, implantation is used below the Si surface to produce conducting regions needed for device fabrication - for example, the heavily doped source and drain of a MOSFET. PVD, on the other hand, is used above the Si surface to deposit conducting films needed to contact and interconnect these devices together into an integrated circuit.

Implantation doping is often thought of as a front end of line process and thin film sputter deposition as back end of line - which has fostered a kind of cultural isolation between the two worlds. In my experience, technical workshops and conferences on doping rarely include process engineers from deposition, and vice versa. Just consider that this year`s major international meetings on multilevel interconnect metallization (VMIC`96) and ion implantation (IIT`96) were held the same week in June - but in California and Texas, respectively!

Actually, doping and deposition have more in common than most people realize, and the two technologies are likely to overlap even more strongly in the future. The device-driven reason is that scaling down of vertical dimensions for ULSI devices is effectively bringing both ion implant doping and thin film sputter deposition closer to the wafer surface - and therefore closer to each other. The productivity-driven reason is the economic advantage of processing devices on 300-mm wafers in single-wafer tools. I believe that the intersect course of doping and deposition and its implications for synergistic equipment development have gone largely unnoticed by the inhabitants of the two worlds.

Device doping roadmaps show that next-generation 0.18 ?m ULSI devices will employ heavily doped, ultra-shallow source/drain regions (|500? junction depth). This in turn will require using implant energy below 1 keV for deeply penetrating, low mass ions such as 11B+ while keeping ion dose high enough for proper conductivity. On the other hand, device interconnect roadmaps indicate that making contact to these shallow regions will require PVD deposition of ultrathin layers of metals such as Ti or Co (< 50?) - which only amounts to a few monolayers of metal atoms. Once you realize that the number of sputtered metal atoms in a single atomic layer (|1015 atoms/cm2) is roughly the same as the number of ions in an ultrashallow implant (|1015 ions/cm2), you see that PVD is very much like a ULSI source/drain implant in terms of both depth and dose. Even the sheet resistance of the thin contact layer (|50 W/sq) is comparable to that of the shallow implant (|100 W/sq), so that both worlds will continue to share a common metrology (e.g. four point probe sheet resistance mapping). Requirements for within-wafer uniformity of implant and PVD will also be similar with 3s sheet resistance uniformity of a few percent (2-3%) over 200-mm and 300-mm wafers.

Another area of common and converging interest is process temperature. Implantation has always been done at relatively low process temperature (<<200?C) in order to avoid pattern degradation of the resist. In part because of the reduced thermal budget of ULSI devices and in part because lower-K interlevel dielectrics are likely to be polymers that cannot tolerate high temperature, PVD will also require lower process temperature and wafer chucks with better cooling capability. With regard to wafer temperature control, both implant and PVD are already moving away from mechanical edge clamping and toward electrostatic wafer chucks with backside gas for improved heat transfer.

The full-surface holding of an electrostatic chuck will also be required for both technologies in order to cope with 300-mm wafers, which are highly susceptible to bowing from backside gas due to their increased surface-area-to-thickness ratio (the area of a 300-mm wafer is 2.3 times that of a 200-mm wafer, but its thickness is nearly the same). Implanters with electrostatic chucks are already in production, and chucks for higher-temperature PVD applications (|450?C) are under evaluation.

As regards advanced equipment design, PVD modules have been long available for vacuum-integrated, single-wafer cluster tools. On the other hand, high current implantation has historically been a batch, multiwafer process. This situation is rapidly changing due to the need to process 300-mm wafers, the desire to control implant tilt angle over a large range, and the fact that single-wafer cooling is suitable for the lower ion energy and dose (i.e. lower implanted power) required for implanting ULSI devices. With the introduction of single-wafer, high-current tools and exploration of plasma doping concepts, it is likely that implant will soon join PVD as a cluster tool-compatible technology.

From a fundamental physics point of view, both PVD and implant have always had a strong interest in controlling the directionality of material: accelerated ions for implant and sputtered neutrals for PVD. The need to improve the bottom coverage of PVD in high-aspect-ratio structures (AR >4:1) is likely to bring the two technologies even closer. In particular, the ionized PVD method pioneered at IBM by S. Rossnagel and colleagues is rapidly emerging as a way of extending sputter deposition for ULSI contacts, liners, and even plug filling through the use of directional beams of low-energy metal ions (<100 eV). Given that implant technology already addresses the creation and delivery of highly directional, low-energy metal ion beams (e.g. 1 keV As+ and P+ beams for n-type doping), there is every reason to expect PVD and implant to overlap more strongly in the future.

Considering the mutual interest in exploiting directional metal ion beams and that the mechanically limited throughput of an implanter is probably the highest of any fab tool (>200 wafers/hr), is it possible that in the future a single-wafer implant end station will be used as a common high-productivity platform so that merely changing from implant source to ionized PVD source converts the tool from doping to deposition? Or that implant will simply be one of several modules on a cluster tool where a vacuum integrated preclean would precede the implant doping and a plasma photoresist strip and RTP activation would follow?

Such synergistic equipment development for PVD and implantation is not that far-out a concept or that far away; and the good news is that the semiconductor equipment industry, with a foot in both worlds, is well positioned to take advantage of the diminishing distance between doping and deposition.

Ronald Powell is the Director of Varian Research Center programs on semiconductor processing equipment; ph 415/424-5078, fax 415/855-8454.