IBMs ASIC technology uses copper interconnects

11/01/1997

IBM`s ASIC technologyuses copper interconnects

IBM Corp., East Fishkill, NY, said it has successfully harnessed a copper metallization process, and has put the technology to work on a pilot production level. Known as CMOS 7S, the technology employs a six-layer copper interconnect process instead of aluminum, and is capable of producing feature sizes down to at least 0.2 micron. IBM officials agreed with industry analyst predictions that the breakthrough gives the chipmaker about a one- to two-year lead on its competitors.

Pilot production using the process is currently underway in East Fishkill, and by the first half of 1998, the company said it will roll out commercial production of its next-generation ASIC products from its Burlington, VT, facility.

According to a spokesman, IBM is using a chemical plating process for the copper deposition, along with a proprietary barrier layer (of an undisclosed material) to prevent the copper from migrating to other areas of the device. The process uses silicon dioxide as the dielectric material.

- WaferNews