Improving wafer defect and impurity prevention with carrier lifetime measurements
09/01/1997
Cover Article
Improving wafer defect and impurity prevention with carrier lifetime measurements
William H. Howland, Jr., Keithley Instruments Inc., Cleveland, Ohio
Many semiconductor process improvement efforts are focused on defect and impurity detection and remediation. Different types of defects and impurities arise from a variety of sources, so different measurement techniques have been developed for characterizing these problems [1]. Several of these rely on charge carrier lifetime measurements, which can focus on either the wafer surface, the bulk semiconductor material, or both, involving either minority carriers alone or minority carriers and majority carriers [1].
The basic doping of most semiconductors produces either an n-type or p-type device. N-type semiconductors have more electrons than holes (i.e., electrons are majority carriers and holes are minority carriers). For p-type semiconductors, the opposite is true. But doping is only one way of altering charge carrier concentrations in semiconductors.
Other ways of generating carriers include the application of a voltage bias or the introduction of light. If the energy of the light incident on the semiconductor is greater than the bandgap of the semiconductor (typically 1.12 eV for silicon), electron-hole (e-h) pairs are generated. This means that the energy of the light "breaks" an electron away from a bound energy level (this energy level will be in the valence band) and raises the electron to an energy level where it can contribute to conduction or current flow (this energy level will be in the conduction band). In addition, because an electron has left the valence band, the hole created can also contribute to conduction or current flow.
In an unperturbed semiconductor (where no voltage or light bias is applied), e-h pairs are always being created by thermal generation [2, 3]. A thermal energy equal to kT, where k is the Boltzmann`s constant (8.617 ? 10-5 eV K-1) and T is the temperature in K, is sufficient to generate some e-h pairs. However, carriers also undergo a process called recombination in which e-h pairs are annihilated [2, 3]. Figure 1 shows the e-h pair generation and recombination process. In an unperturbed semiconductor, the two processes are in an intricate balance with one another. (In thermodynamics, this is called the principle of detailed balance.)
The average time it takes to generate an e-h pair is defined as the generation lifetime, while the average time it takes for an e-h pair to recombine is defined as the recombination lifetime [1]. It is not possible to measure either of these values without the application of either a voltage bias or light bias. By applying a light bias and thereby generating an excess of e-h pairs, we can measure the recombination time for the excess charge carriers. By applying a voltage pulse to create a state of e-h pair deficiency (the semiconductor will attempt to restore thermodynamic equilibrium), we can measure the generation lifetime.
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Figure 1. a) Electron-hole (e-h) pair generation through impurity; b) e-h pair recombination through impurity. EC = conduction band edge; EI = impurity or defect energy level; EV = valence band edge.
Lifetime parameters
The three parameters typically extracted from lifetime measurements are:
carrier lifetimes,
carrier diffusion lengths, and
surface velocities.
Recombination lifetime, surface recombination velocity, and diffusion length measurements typically depend on the charge carrier injection level, defined as the ratio of excess carrier concentration (light bias on) to the carrier concentration present under equilibrium conditions (no light bias) [1].
In silicon, the recombination rate (the number of carriers recombining/cm3/sec) is dominated by Shockley-Read-Hall (SRH) recombination, which simply means that recombination takes place via defects and impurities [2, 3]. The recombination lifetime is related to the SRH recombination rate such that,
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where
Dnp is the excess electron concentration (we have assumed p-type silicon), U is the SRH net recombination rate, and tr is the recombination lifetime.
The diffusion length, L, is the average distance a carrier will diffuse before it recombines. It is related to the lifetime through the following formula [4]
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where
D is the diffusion coefficient in cm2/sec. The surface recombination velocity, Sr, is defined once again using U from SRH except that U is now in units of number of carriers recombining/cm2/sec, since we are focusing on the surface. Sr is defined as
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Finally, the iron concentration can be calculated using the formula [5] where L1 is the diffusion length for silicon after dissociation of iron, and L0 is the diffusion length for the silicon before dissociation of iron. To use this equation, iron must be the only electrically active impurity to undergo a point defect reaction at 210?C, but this condition is usually easy to verify.
The surface recombination lifetime, trs, depends on the surface recombination velocity such that trs = sample thickness/2Sr [1].
Generation lifetime, surface generation velocity, and the U of SRH defined above are considered for the case where a deficiency of carriers is created. In this case, G = -U where G is the number of e-h pairs created/cm3/sec for the bulk and the number of e-h pairs/cm2/sec for the surface. The reduction of the formula for G thus leads to definitions of the surface generation velocity, surface generation lifetime, and the bulk generation lifetime.
Relationship between lifetime parameters and defects
The SRH net recombination rate, U, is related to defects in a rather complex manner [2, 3]. For purposes of this article, it is sufficient to say that the relationship depends in part on the defect concentration and defect energy level. The value tr must also be a function of defect energy level and defect concentration. In addition, lifetime is affected by the injection level, which is determined by the stimulation and measurement techniques used.
Depending on the technique, one or more of the following parameters is commonly measured, any of which may be related to defects and impurities:
bulk recombination lifetime (BRL),
bulk diffusion length (BDL),
surface recombination velocity (SRV),
surface recombination lifetime (SRL),
surface generation velocity (SGV), and
surface generation lifetime (SGL).
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The 12 techniques described in the table above are the ones most often used to make lifetime measurements. As indicated, some techniques are suitable for a production setting, while others aremore suitable for laboratory measurements.
Applications
Two of the most common applications for lifetime measurements are detection of iron contamination and monitoring of oxygen precipitation. In both cases, defects can appear at the wafer surface or in the bulk semiconductor material, which has important implications for the selection of measurement techniques. Iron detection is described below to illustrate some of the principal issues involved in choosing a measurement method.
Metal contamination is a major yield-limiting factor in silicon IC production, and iron is one of the most significant metal contaminants. It severely affects oxide integrity, lowering breakdown voltage with increasing iron concentration. It also increases junction leakage currents since Fe is a very efficient lifetime "killer." If the metal concentration is high enough, FeSi2 rods can form in the bulk material, causing shorted p-n junctions and leading to a linear I-V relationship.
Iron gets into semiconductor materials during wafer-cleaning processes and through processing equipment. It can take the form of interstitial iron, Fei, or iron-boron pairs, FeB, where boron is the dopant. Figure 2 illustrates these two defects along with their relative positions in the energy gap.
Fortunately, a technique has been developed for measurement of iron concentration, based on the fact that Fe has two states in boron-doped silicon [5]. The percentages of iron in the Fei and FeB states depend on the boron concentration and the temperature. At room temperature, with [B] >1014 cm-3, all the iron is bound in the FeB state. For T >200?C and [B] <1016 cm-3, most of the iron is on interstitial sites.
Under conditions of low carrier injection, Fei is a more effective recombination center than FeB. Thus, the lifetime and diffusion lengths are smaller for the Fei state than the FeB state. The initial diffusion length is measured while all the iron is in the FeB state, and another diffusion length is measured after the iron has been converted to the Fei state.
Two methods are commonly used to dissociate iron from boron and thus convert it to its interstitial state: the sample is heated at 210?C for ~10 min. and then quenched quickly in water or on an aluminum plate; or the sample is illuminated with high-intensity light. Shortly after dissociation, the second diffusion length measurement is made with most of the iron in the Fei state.
Comparison of measurement methods
Currently, the surface photovoltage (SPV) method (see table) is used most often to make iron concentration measurements. The quantity of iron in the surface region tends to be more interesting to process engineers than the quantity in the bulk material, since the surface is the most electrically active region for devices. Therefore, results obtained with SPV, a bulk measurement technique, may not be adequate by themselves.
Diffusion length is often thought to determine the level of iron concentration throughout a sample, including that at the surface. However, this assumption may be misleading, since the iron can out-diffuse or precipitate from the surface after annealing. Since process engineers need to know the quality of the material at the surface, pulsed MOS (or pulsed COS - both measurements yield the same parameters) is essential. It concentrates on the surface region instead of the bulk and the results of pulsed MOS measurements have been shown to correlate well with deep-level, transient spectroscopy [6, 7].
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Figure 2. a) Recombination through the iron/boron (FeB) defect; b) recombination through the interstitial iron (Fei) defect. EC = conduction band edge; EV = valence band edge.
The pulsed MOS technique measures the surface generation lifetime. By combining it with the SPV diffusion length, process engineers have both surface and bulk measurements of the wafer. Still, the need to add conductive contacts to the wafer can take days of processing time.
Since the pulsed COS method is a noncontact technique, it does not require the addition of conductive dots to the wafer. This shortens the test cycle and substantially reduces measurement costs. The only question is in how well it correlates with the pulsed MOS method, since a large body of data has been collected using the latter.
Both pulsed MOS and pulsed COS techniques create a scarcity of charge carriers in the surface region of the wafer. Pulsed MOS does this via a voltage applied to the gate of a MOS structure, whereas pulsed COS uses corona charge applied to the oxide surface. In pulsed MOS, the resulting surface capacitance is measured as a function of time using a contact probe. Changes in capacitance relate to the surface generation lifetime. In pulsed COS, the surface voltage is measured as a function of time using a noncontact Kelvin probe. The voltage-time relationship is related to capacitance and the surface generation lifetime in a manner similar to the pulsed MOS method.
A major advantage of pulsed COS is the surface junction and corona guard ring formation (Fig 3). For the p-type, negative charge is deposited over a diameter, dA, first. Next, positive charge is deposited over a diameter, dI, such that dI Figure 3. Surface junction and guard ring formation process using corona charge. In pulsed MOS measurements, metal deposition on the surface around a metal dot forms a guard ring to which a voltage is applied. This procedure has two major drawbacks. First, metal must be deposited on the surface, and second, there is a significant gap between the guard ring and the metal dot; significant carrier generation can take place in this gap region. Recent studies report both pulsed MOS and pulsed COS measurements conducted on the same wafers [8]. Pulsed COS measurements were conducted first. Then aluminum contacts were evaporated onto the wafers and the generation lifetime was remeasured by conventional pulsed MOS. The MOS measurements were taken at locations on the wafer close to the positions of the original COS measurements. The two methods agree in general, although there is some local variation. Part of that can be attributed to variations in device locations on the wafer. Si wafers frequently exhibit a fair amount of scatter in generation lifetime values due to a lack of homogeneity in either the bulk or the interface. Since the two measurements were not necessarily made on exactly the same spot, some variation is expected. Instrumentation available for pulsed COS measurements Currently, Keithley Instruments` Quantox unit (Fig. 4) is the only commercial instrument capable of pulsed COS measurements in a production setting. This IC wafer test system can put a test wafer through a series of charge measurements in a matter of minutes, since it does not require days of processing to apply contacts or otherwise prepare the wafers for test. Figure 4. Keithley Quantox system. Figure 5 shows the three basic technology components used in COS measurements. Corona biasing charges room air to apply a known bias to the semiconductor oxide surface. The Kelvin probe, a vibrating capacitor plate placed in close proximity to the surface, can be used to measure the voltage at the surface of the oxide. The SPV is measured by placing a stationary, transparent, conducting probe over the surface and shining light through the probe. SPV measurements produce the underlying silicon`s contribution to the voltage at the surface of the oxide. Combining Kelvin probe and SPV measurements allows separation of the two surface voltage components, i.e, the oxide voltage and the silicon surface potential.n Figure 5. Three primary Quantox technology components. References 1. D.K. Schroder, Semiconductor Material and Device Characterization, Wiley-Interscience, New York, NY, 1990. 2. W. Shockley, W.T. Read, "Statistics of the Recombination of Holes and Electrons," Phys. Rev., Vol. 87, pp. 835-842, 1952. 3. R.W. Hall, "Recombination Processes in Semiconductors," Proc. IEEE, Vol. 106B, pp. 923-931, 1960. 4. A.M. Goodman, "A Method for the Measurement of Short Minority Carrier Diffusion Lengths in Semiconductors," J. Appl. Phys., Vol. 32, p. 2550, 1961. 5. G. Zoth, W. Bergholz, "A Fast, Preparation-free Method to Detect Iron in Silicon," J. Electrochem. Soc., Vol. 140, No. 7, 1993. 6. X. Gao, S. Yee, "Comparison of Metal Oxide Semiconductor Capacitance-Time and Surface Photovoltage Methods in Investigating Annealing Behavior of Iron Contamination in Boron-doped Silicon," J. Electrochem. Soc., Vol. 140, No.7, 1993. 7. X. Gao, H. Mollenkopf , S. Yee, "Annealing and Profile of Interstitial Iron in Boron-doped Silicon," Appl. Phys. Lett., Vol. 59, p. 2133, 1991. 8. D.K. Schroder et al., "Corona-oxide-semiconductor Generation Lifetime Characterization," Solid-State Electron., in review. WILLIAM H. HOWLAND, JR. received his BS degree in electrical engineering and his PhD degree in engineering science from Pennsylvania State University. In 1995, he joined Keithley Instruments, where he focuses on semiconductor charge carrier lifetime measurements. Keithley Instruments Inc., Quantox, 30500 Bainbridge Rd., Cleveland, OH 44139; ph 216/498-3082, fax 216/498-2911.
