CMP dishing effects in shallow trench isolation
07/01/1997
CMP dishing effects in shallow trench isolation
Konstantin Smekalin, VTC Inc., Bloomington, Minnesota
CMP is gaining popularity as a process for achieving global planarity across silicon wafers. One front-end CMP application is planarization of the wafer surface after isolation trenches are etched and subsequently filled with oxide. As device sizes rapidly shrink, STI is preferable to local oxidation of silicon (LOCOS) isolation for several reasons: much tighter control over device and isolation dimensions, and elimination of LOCOS "bird`s beak" problems.
Though planarization of the glass layer in STI is similar to the planarization of interlayer dielectrics (ILD) in metallization, STI has its own unique features. In a STI process flow [1], isolation regions on the wafer are formed by etching 0.3- to 1.0-?m deep trenches in single-crystal silicon through an appropriate mask, and then filling them with CVD glass (Fig.1).
Shallow trench isolation and CMP
The mask for STI trench etching is usually a layer of thermally grown pad oxide (about 20 nm) and a layer of CVD nitride (100-300 nm). To define a hard mask, a resist layer with a desired isolation pattern is formed, and the dielectric layers are reactive ion etched (RIE). Shallow trenches are etched in silicon using a chlorine-based plasma. After resist stripping, a layer of thermal oxide is grown on the trench sidewalls and bottoms, and a layer of CVD oxide is deposited to fill the trenches. A densification step usually follows to improve the structural quality of the deposited glass layer.
Next, the glass surface has to be planarized to reduce the topographic variation and to expose the nitride layer over active-device areas for subsequent stripping. Thus, the hard mask nitride layer also functions as the polish-stop layer for CMP. The total thickness of the nitride layer determines how much CMP nonuniformity and "over-polish" can be tolerated before the active-device areas are exposed and damaged by polishing.
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Figure 1. Simplified shallow trench isolation (STI) process flow; a) etching trenches with a nitride mask; b) filling trenches with CVD glass; c) planarization with subsequent stripping of the nitride mask.
Although CMP of glass is widely used in the industry [1-3], the true physical and chemical process mechanisms have not yet been clearly identified. (See "Oxide CMP mechanisms" on p. 169 of this issue for further discussion of this point.) The process has chemical and mechanical components, with none of them playing the major role, unlike the simple abrasion of a material by hard particles where a liquid solution only assists in the transport of by-products.
The CMP of glass is carried out with high-pH slurry (usually 10.0-11.0), and some chemical reaction between the slurry and the glass occurs, hydroxylating the thin surface layer of the glass, which is subsequently removed by mechanical abrasion with very fine silica particles [4-7]. The process is known to obey Preston`s law:
where
dR/dt represents the polishing rate
K = the Preston coefficient
p = the effective pressure exerted on the glass surface
V = the relative speed between the polished surface and the polishing pad
In polishing a wafer with uneven surface structures, the effective pressure (p in Preston`s law) exerted on elevated features is higher than the pressure exerted on recessed areas, so the elevated areas polish faster. CMP would ultimately produce a perfectly planar surface if the polishing pad were infinitely stiff. Real-world polishing pad flexibility, however, creates above-zero polishing pressure in recessed areas, especially in the middle of wide exposed regions. This pressure causes the excessive thinning of wide oxide regions known as dishing (Fig. 2).
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Figure 2. Origin of conventional dishing effect in CMP; a) polishing pad flexes into trench opening; b) formation of a concave surface; c) trench area remains "dished" after planarization.
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Figure 3. a) Nitride mask removal vs. exposed oxide area minimum dimension (determined by SEM cross-sections, before and after CMP). Masked areas were 5 ? 5 ?m square islands surrounded by continuous isolation, with varied spacing between islands. The zero isolation spacing result shows the extent of simple (non-area-dependent) over-polish; this 65 nm value should be subtracted from the other values in both 3a and 3b to get the area dependence. b) Area dependent nitride mask removal vs. mask minimum dimension, for two exposed oxide minimum dimensions (5 and 50 ?m).
Limited pad stiffness also averages the effective pressure p over small mask areas, typically a few millimeters in diameter, rather than over the whole wafer. The mask feature density variation across the wafer leads to effective pressure and polishing rate variations, causing some areas to polish considerably faster. The amounts of both nitride over-polishing and oxide dishing depend on the combined effects of individual feature sizes and the distance between the features in an array [1, 8, 9].
Experimental method
Experimental data were obtained with a dual-head planarizer using SS25 slurry (Cabot Corp.) on IC1000/Suba IV stacked pads (Rodel Inc.). The slurry solids content was 12.5 wt.%, with 10.8-11.0 pH after 1:1 dilution with DI wafer. 150-mm silicon wafers were polished, then buffed at the secondary table with DI water, and finally cleaned.
Dishing vs. isolation area was determined by wafer surface AFM profiling after 7 min CMP, at 9 psi polishing pressure, with 20 rpm polishing table speed, and 15 rpm platen speed (Fig. 3a). Masked areas were 5 ? 5 ?m square islands surrounded by continuous isolation. The distance between adjacent masked areas, the isolation spacing, increased in both x and y directions from the center of the wafer.
The test wafer layout produced large (several-mm) areas in the wafer center that were defined by a continuous mosaic of 5 ? 5 ?m nitride masks (i.e., zero isolation spacing). The nitride over-polish at zero isolation spacing, as determined by SEM cross-section before and after, is "simple" over-polishing - without microscale variation.
Where the 5 ? 5 ?m nitride masks had recessed oxide spaces between them, the extent of over-polishing was proportional to the isolation spacing (Fig. 3a). To obtain the area-dependent nitride over-polish, the simple over-polishing (65 nm) should be subtracted from the data shown in Fig. 3a. Area dependent nitride over-polish gradually increased from 50 to 120 nm, as the isolation spacing increased from 1 to 50 ?m.
For constant isolation spacing, the amount of nitride mask over-polish depends on the mask area. Smaller masked areas experience increased effective polishing pressure and are therefore polished faster (Fig. 3b). These data were obtained by SEM cross-sectioning the same wafer shown in Fig. 3a, so the same amount of simple over-polishing should be subtracted from all the data in Fig. 3b to obtain area dependent results.
Microscale dishing effect
A new microscale dishing effect was observed in oxide regions with <10 ?m minimum dimension. To explore the mechanisms behind this previously unreported effect (Fig. 3), we fabricated an array of long isolation trenches surrounded by mask pedestals. With all other variables held constant, these structures allowed the exposed oxide area to be independently evaluated as a dishing variable. AFM profiles of the wafer surface for two trenches, 1 and 5 ?m wide, show that the surface becomes perfectly planar after 6 min of CMP (Fig. 4). However, the process requires five more min to expose the nitride layer uniformly for subsequent stripping.
After 11 min of CMP, the exposed oxide recession is 44 nm - equal for both trenches. The recession remains at 44 ?6 nm, independent of polish pressure, speed, and over-polishing time, as long as some nitride remains (over hypothetical active-device areas). SEM cross-sections also showed a 40-50 nm step between isolation and device areas.
For relatively wide (>10 ?m) trenches, dishing occurs because slower nitride removal results in thicker mask areas and reduced polishing pressure on exposed oxide areas [6, 9]. This reduction, however, varies with exposed oxide area, due to the elasticity of the polishing pad. Wide oxide areas experience continued polishing at slightly reduced pressure, even when surrounding nitride areas are completely exposed. This mechanism suggests that the amount of dishing has to be strongly dependent on polishing pressure, field width, and over-polishing time among other parameters.
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Figure 4. AFM profiles at various stages of the planarization process for both a 5- and a 1- ?m trench: a), d) before CMP; b), e) after 6 min of CMP; c), f) after 11 min of CMP. After 6 min, the surface is relatively planar since the nitride mask is still covered by oxide. After 11 min, removal rate
differences create a step between oxide and nitride regions.
None of these process parameter variations influenced the amount of dishing for exposed oxide areas below 10 ?m in minimum dimension. Over-polishing time (after nitride exposure) did not influence the amount of dishing either, as long as the nitride layer was not polished away completely. A different explanation for microscale dishing is required.
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Figure 5. Origin of microscale dishing; a) formation of a hydroxilated oxide surface during CMP; b) remote oxide polishing while the pad is in direct contact with nitride; c) the oxide surface remains recessed.
Silicon dioxide CMP mechanisms suggest that hydroxylation of the oxide surface is followed by mechanical removal of the hydroxylated layer (Fig. 5). The nitride surface is not hydroxylated by the slurry and is therefore removed primarily through mechanical abrasion. Removal of material from the oxide surface can occur without intimate pad contact, by a "hydroplaning," hydrodynamic process. Such removal is limited by the separation between the pad and the oxide surface, and, at a characteristic separation distance, hydrodynamic pressure becomes insignificant and the process completely terminates.
This characteristic separation is very close to zero for the nitride layer, while chemical softening of the oxide surface results in additional removal and larger separation. When the surface of the wafer is perfectly flat and both nitride and oxide are exposed, size-.independent oxide polishing continues after nitride polishing has stopped, creating oxide-to-nitride steps of limited height (Figs. 5b and 5c).
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Figure 6. A two-step CMP/RIE planarization sequence eliminates microscale dishing, as shown by AFM profiles; a) before CMP; b) after 7 min of CMP; c) after RIE. Compare these results to Figs. 4c and 4f.
A hydrodynamic polishing model implies that step height should strongly depend on slurry and oxide properties. The experimental results using high-pH slurry with considerable solids content are consistent with this model. Further experiments are needed to determine the step reduction that is achievable by a change to low-pH or highly dilute slurries. The model also implies that step height should exhibit little variation with other process parameters such as rotation speed and downforce pressure.
Microscale dishing will occur for any exposed oxide area, but its effect is obscured for minimum dimensions over 10 ?m by the larger mechanical dishing caused by pad elasticity. For smaller regions, however, microscale dishing limits the minimum achievable step height between oxide and nitride regions in a one-step CMP process. This small, finite step could be a problem in STI planarization.
Two-step CMP/RIE planarization
We used a combination of CMP and RIE to achieve a perfectly planar surface at the nitride level (Fig. 6). First, the oxide was polished just to the point of planarity across the wafer. Then RIE was used to remove an even layer of oxide, with an endpoint algorithm tuned to stop the etching as soon as the nitride layer was exposed to plasma.
The AFM profile of the resulting surface (Fig. 6c) shows no dishing, in contrast to that observed in the CMP-only process (Figs. 4c, 4f). Although somewhat more complex, the two-step CMP/RIE planarization process produces excellent planarity and provides better control over the remaining nitride layer thickness over active-device regions.
Conclusion
Dishing of isolation oxide in the STI process appears when the silicon nitride mask layer over active-device regions is exposed during CMP. Microscale dishing for 1-10 ?m exposed oxide minimum dimension was independent of CMP parameters and over-polishing time. Hydrodynamic oxide removal, reaction limited by oxide-to-nitride step height, is suggested as the microscale dishing mechanism.
High-pH slurry with more solids content is likely to produce larger microscale dishing. Excellent planarity with no dishing can be achieved when an oxide RIE step follows CMP. A combination of CMP and RIE is suggested as an alternative to a CMP-only process for planarization in STI.
Acknowledgments
The author would like to acknowledge the support and encouragement of the Technology Development team of VTC Inc.
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KONSTANTIN SMEKALIN received his PhD degree in solid state physics from the A.F. Ioffe Physico Technical Institute in St. Petersburg, Russia, in 1992. In early 1996, he joined the Technology development team at VTI Inc., where he works on the development of CMP processes. VTC Inc., 2800 E. Old Shakopee Rd., Bloomington, MN 55425; ph 612/853-5100.