Pad conditioning in interlayer dielectric CMP
06/01/1997
Pad conditioning in interlayer dielectric CMP
Iqbal Ali*, Sudipto R. Roy+, Texas Instruments, Dallas, Texas
Degradation of interlayer dielectric (ILD) removal rate and short pad life are serious concerns with chemical mechanical planarization (CMP) technology. Glazing of the pad surface and inadequate pad conditioning are primary causes for the decrease in removal rate. This study investigates the effect of pad conditioning on removal rate and nonuniformity using various characterization techniques. The results imply that the degradation of removal rate is a surface phenomenon and that chemical interaction between slurry and polish pads is insignificant.
CMP is one of the fastest growing and most important planarization technologies for advanced multilevel interconnects [1-2]. Incomplete understanding of the subtle interactions between the wafer, pad, and slurry limits the manufacturability of this emerging technology [3-6]. Pad degradation reduces slurry delivery to the wafer surface, causing an unstable and lower removal rate [7, 8]. Pad conditioning forms microscratches on the pad surface, thereby opening the pores of the pads and channeling slurry between the wafer surface and the pad. Conditioning puts the pad surface into a proper state for subsequent polishing and maintains a relatively stable removal rate with time. This study applies various surface analyses and analytical techniques to the problem of pad conditioning.
Experimental materials and methods
All the polishing experiments used a model 6DS-SP single platen, dual-head chemical mechanical planarizer from R. Howard Strasbaugh Inc. The wafers were polished using a polyurethane-based stacked pad (IC1000/Suba IV, Rodel, Newark, DE) and a fumed silica slurry (CAB-O-SIL, Cabot, Tuscola, IL), then buffed for about 35 sec. Subsequent cleaning used a quick-dump-rinse megasonic bath with a basic solution, followed by removal of the mechanically embedded and physically adhered particles by a brush scrubber. The break-in period for new pads lasted 15-20 min, during which 8-10 plasma-enhanced tetraethyl orthosilicate (PETEOS) wafers were polished at 20 rpm table speed, with 8-10 conditioning cycles. We reduced the conditioning cycle between wafer loading steps following the break-in period. After polishing 160 wafers, each for 300 sec, conditioning of the pad between loading steps was stopped and a few more wafers
were run to determine the removal rate [9].
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Figure 1. Polishing pad cross section.
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Figure 2. Effect of pad conditioning.
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Figure 3. Removal rate and nonuniformity a) after polishing 160 wafers with standard pad conditioning, and b) after polishing 50 more wafers, 210 total, with no pad conditioning.
The used pads were cleaned with deionized (DI) water in a megasonic tank for about 5 min, followed by cleaning with KOH and HF for 10 min. The pad sections were air-dried, then analyzed by atomic force microscopy (AFM) [10].
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Figure 4. Scanning electron microscope (SEM) micrographs of a) new and b) used pads.
New and used pads were placed in a supercritical fluid extractor (SFE) for 30 min under high-pressure CO2 and the extracting solvent. A Fourier transform infrared (FTIR) spectrometer coupled with a plan microscope provided microspot infrared identification of the extractables. FTIR is based on absorption of IR radiation due to molecular vibration of the functional groups in the polymer chain. This spectrometer used a mercury cadmium telluride (MCT) liquid-nitrogen-cooled detector to cover the mid-IR range from 4800-400 cm-1, allowing identification of organic contaminants in a very small region across the surface. Gas chromatograph (GC) mass spectroscopy was used to determine the chemical structure of the polymers [11].
Further analyses for ionic contamination used an ion chromatograph for anion analysis, and a flame atomic absorption spectrometer and an inductive coupled plasma (ICP) analyzer for cation analysis. Water extraction of the new and used pads was done in a precleaned heat seal bag placed on a steam bath for 1 hr at 80?C. The extract from the bag was then transferred to a clean polypropylene container and analyzed.
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Figure 5. SEM images of pads a) with and b) without conditioning.
Results and discussion
Figure 1 illustrates a cross section of a perforated pad. The perforations have sufficient depth (250-300 ?m) to hold slurry; pad conditioning with a diamond disk (Fig. 2) helps channel slurry across the pores beneath the wafer surface during polishing [12]. The spacing between the perforations is important for effective removal rate and nonuniformity control. Figure 3a shows the typical removal rate and nonuniformity after processing 160 wafers (5 min polish time) with standard pad conditioning between wafer loading. The average removal rate for the 6 test wafers was 1826 ?/min with a 5% nonuniformity.
The removal rate at the beginning of the pad life was 2124 ?/min.
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Figure 6. FTIR analysis of new and used pads.
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Figure 7. a) Anion and b) cation analysis of new and used pads.
To understand the effect of pad conditioning on the removal rate, we polished 50 additional wafers (210 total on the pad) without conditioning the pad surface. All other conditions remained the same. The removal rate dropped drastically to an average of 750 ?/min (Fig. 3b). Nonuniformity deteriorated from 5 to 15% as well.
The pad surface tends to glaze with use, thereby decreasing the slurry-holding capacity and degrading the removal rate (Fig. 4). The most difficult part of polishing seems to be maintaining a stable removal rate and uniformity with time [6, 13, 14]. Three-dimensional AFM image analysis of both new and used pads under standard pad conditioning showed no significant difference in the surface roughness. However, root mean square (rms), average (Ra), and maximum (Zmax) roughness of the pads without conditioning was four times the roughness of the pads with pad conditioning. This behavior was attributed to uneven filling of the pores and smearing of the pad surface with slurry. Figure 5, a used pad with and without conditioning, shows complete clogging of the pores and unevenness of the surface. As polishing without pad conditioning progresses, the pores fill with slurry, reducing slurry delivery to the wafer surface.
Exposure of the pad surface by partially etching the accumulated slurry would explain a slight difference in the surface roughness between used pads without conditioning and pads treated with etchants. Polyurethane pads are resistant to acid and alkaline solutions [15]. Still, -COC- and -COOC- groups in the main chain structure of polyurethane elastomers allow some degree of hydrolytic attack over time, depending on the chemical structure of the polyurethane [16]. GC and FTIR analyses of the pad extracts examined the structural changes in the polyurethane-based polymeric pads due to polish pressure and the alkaline environment during polishing. The results of the FTIR analysis (Fig. 6) show no significant difference in the chemical composition between the new and the used pads, indicating no significant degradation of the used pads during polishing. Figure 7 shows significant differences in the ionic contamination between the two pads, a result of contamination from accumulated debris.
Conclusion
Our investigation indicated that suitable pad conditioning is the key to a stable removal rate. The degradation of removal rate when pads are not conditioned is caused by a reduction in slurry delivery to the wafer and by glazing of the pad surface. Degradation appears to be a surface phenomenon; the chemical interaction between the slurry and the polish pads is insignificant.n
Acknowledgment
The authors would like to express their thanks to Fred Vaughan, Patrick Jones, Herb Moltzan, and Valere Sewell for SEM, AFM, ion chromatography, and ICP analyses; and to Marvin Cowens of the Materials Science Laboratory at Texas Instruments (TI) for GC and FTIR characterization of the polish pads.
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IQBAL ALI received his MS and PhD degrees in materials science and engineering from the University of Arizona, Tucson, in 1987 and 1990, respectively. He worked in CMP and post-CMP cleaning process technology at Intel Corp. from 1990-1992, and at the Semiconductor Process and Device Center at Texas Instruments from 1992-1997. He rejoined Intel in March of 1997. He is the author or coauthor of 25 publications in the
field of CMP and post-CMP cleaning and is an active member of the Electrochemical Society. Intel Corp., 2200 Mission College Blvd., M/S RNB-2-35, Santa Clara, CA 95052; ph 408/765-6539, fax 408/765-0324.
SUDIPTO R. ROY received his MS degree in nuclear technology from the University of Cincinnati in 1984, and his PhD degree in mechanical engineering from the University of Texas, Arlington, in 1995. He joined Texas Instruments in 1989, and has worked on research and development activities in the areas of CMP, post-CMP cleaning, wafer cleanup, oxidation, CVD, CVD reactor design, and reactor modeling. He joined Submicron Technology in Bangkok, Thailand, in February 1997.