Technical Program, July 13-18, San Francisco and San Jose, CA
06/01/1997
Technical Program
July 13-18
San Francisco and San Jose, CA
SEMICON/West `97 events begin Sunday, July 13, and continue through Friday, July 18. Wafer processing events will be held in San Francisco, while test, assembly, and packaging events will be held in San Jose.
The exhibition at San Francisco`s Moscone Center (Fig. 1) runs from July 14 to July 16, with show hours from 10:00 am to 6:00 pm on Monday and Tuesday, and from 10:00 am to 4:00 pm on Wednesday. The exhibition at the San Jose McEnery Convention Center (Fig. 2) runs from July 16 to 18, with show hours from 10:00 am to 6:00 pm on Wednesday and Thursday and from 10:00 am to 4:00 pm on Friday.
If you register for a program or an event, you will automatically receive a badge allowing you to enter the exhibition. Registration fees for the technical program events are listed below with each entry. All fees refer to registration after June 13; before June 13, fees are lower. Even if you preregister, SEMI recommends that you check-in any time prior to your program or event at any self-registration terminal or pre-registered counter.
Register on-line via the SEMI web site at http://www.semi.org. Check the web site for availability of programs and events because many of them sell out quickly. Registration is encouraged before June 13 for best selection.
Sunday
Workshop on Gas Distribution Systems
Sunday, July 13, 1:00-5:00 pm
San Francisco Marriott
Technical reports by industry experts and a panel discussion by experts in the user community will focus on techniques for controlling contamination in gas distribution systems. Cost-effective solutions and the need for new or improved standards will be addressed.
Registration: $200
Workshop on Contaminationin Liquid Chemical Distribution Systems
Sunday, July 13, 1:00-5:00 pm
San Francisco Marriott
Join leading experts in a discussion of liquid process chemical distribution systems. The focus will include design issues, ownership and safety costs, performance monitoring challenges, and pressures to make these systems flexible and multifunctional.
Registration: $200
Plasma Etch 97 - Backgrounder and New Developments
Sunday, July 13, 1:00-5:00 pm
San Francisco Marriott
Review the fundamentals of plasma etching and learn about recent developments and trends. Process chemistries and capabilities; the use of conventional and higher-density plasma tools for manufacturing; measuring and preventing plasma damage; and environmental, safety and regulatory issues will be discussed. Experts from academic, research, manufacturing and government settings will make presentations.
Registration: $295
STEP: Equipment Reliability & Productivity
Sunday, July 13, 1:00-5:00 pm
San Francisco Marriott
Hear directly from SEMI International Standards Program members and international experts about progress forming new standards for measuring and documenting equipment productivity. This year`s Standards Technical Education Program (STE) will build upon last year`s program.
Registration: $175
Monday
Symposium on Deep-UV Lithography for Process Engineers
Monday, July 14, 8:00 am-5:00 pm
San Francisco Marriott
International experts will teach you competitive techniques in microlithography, expanding the knowledge you need to implement new generation process technologies. This is an good opportunity to spend a day focused on deep UV lithography as well as the trends in tools, materials and metrology.
Registration: $295.
Silicon-On-Insulator (SOI) Processing Technology
Monday, July 14, 8:15 am-12:30 pm
San Francisco Marriott
Some Japanese and US device manufacturers have announced plans to fabricate integrated circuits using SOI wafers. Listen to a panel of experts as they discuss the present progress and future challenges of SOI technology. Topics will include applications, manufacturing, materials and market acceptance of SOI materials.
Registration: $295.
Facility Layout Design in the Semiconductor Industry - Will Your Equipment Be Ready?
Monday, July 14, 1:00-5:00 pm
San Francisco Marriott
Stay competitive, know how your equipment impacts the nearly $1 billion cost of building and outfitting an integrated circuit fabrication facility. The instructors will draw upon experience and actual case studies to illuminate the relationship of equipment to the larger manufacturing environment. Perspectives will include product flow, work distribution, personnel flow, and the need to build in flexibility for future changes.
Registration: $295.
Symposium on Lithography at an Inflection Point
Monday, July 14, 1:00-5:00 pm
San Francisco Marriott
Gain insight into the future of optical lithography techniques as a panel of experts explores alternatives to traditional optical lithography. They`ll examine x-ray lithography and the promise it holds as the semiconductor industry enters the era of 0.18-?m minimum geometries and resulting 193-nm wavelength requirements.
Registration: $295
Tuesday
MEMS Technology Tutorial
Tuesday, July 15, 8:00 am-5:00 pm
San Francisco Marriott
Spend a day learning about the role of semiconductor materials and equipment in the miniaturization of mechanical systems. MEMS technology is revolutionizing the conventional field of solid-state transducers. This tutorial is designed to provide insight into how materials, processes, and equipment can be optimized to advance MEMS technology and manufacturing.
Registration: $495
Chemical Vapor Deposition for Integrated Circuits Tutorial
Tuesday, July 15, 8:30 am-5:30 pm
San Francisco Marriott
Improve your understanding of the relationship between chemical vapor deposition (CVD) in single-wafer reactors and the equipment in which it is used. Learn how to plan deposition and processing experiments to generate the data for practical device fabrication. CVD fundamentals and IC layers deposited by CVD will be discussed.
Registration: $495.
Material Characterization Strategy for the Gigabit DRAM Era
Tuesday, July 15, 8:15 am-12:30 pm
San Francisco Marriott
This half-day symposium will spotlight the special material characterization challenges imposed by the gigabit DRAM era. Topics in a series of presentations will include advanced defect identification requirements for the sub-0.35-micron process and the challenges for analytical measurements in the gigabit regime.
Registration: $295
Perfluorocompound Technical Update
Tuesday, July 15, 8:00 am-12:00 noon
San Francisco Marriott
Hear the latest details from industry and government experts on the semiconductor industry`s efforts to reduce the use and emission of perfluorocompounds, identified as potential global warming gases by the US government.
Registration: $295
STEP: Automated Reliability, Availability, and Maintainability
Tuesday, July 15, 8:00 am-12:00 noon
San Francisco Marriott
This program - including a panel discussion with time for questions - is a good opportunity to improve your understanding of the ARAM standard (ARAMS). The ARAMS state model; substate codes; estimation of power downtime; compliance and equipment controller software improvements needed to meet these standards; ARAMS implementation; and equipment efficiency metrics will be discussed.
Registration: $175
Wednesday
Planarization Processes for ULSI Fabrication to the Year 2001 Tutorial
Wednesday, July 16, 8:00 am-5:00 pm
San Francisco Marriott
This day-long tutorial has been updated from 1996 for a more comprehensive look at both traditional and new process technologies for planarizing semiconductor devices. The agenda includes step coverage; gap-fill and planarity issues for the as-deposited films; global approaches to planarizing challenges; and the place of planarizing in future fabrication facilities.
Registration: $495
Process Integration and Device Characterization in Microelectronic Manufacturing Tutorial
Wednesday, July 16, 8:00 am-5:00 pm
San Francisco Marriott
This tutorial will develop your knowledge and improve your ability to describe, identify, and summarize the key aspects of process integration and device characterization. It will review submicron manufacturing technologies, examine unit processes, and look at yields, defects, contamination, reliability and failure considerations.
Registration: $495
Workshop on Manufacturing Execution Systems (MES) for Semiconductor Processes
Wednesday, July 16, 8:00 am-12:00 noon
San Francisco Marriott
Hear from users and vendors how MES improve equipment use, yields, and product quality in semiconductor processes. They`ll talk about the economics, the integration of these systems into manufacturing operations, and the role control and automation systems play in MES success.
Registration: $295
STEP: Recipe Management Standard (SEMI E42-96)
Wednesday, July 16, 8:00 am-12:00 noon
San Francisco Marriott
This half-day Standards Technical Education Program will focus on SEMI E42-96, the professional recipe management standard guides software developers in defining system architecture in semiconductor manufacturing. A panel discussion will look at real-world applications of SEMI E42-96.
Registration: $175
STEP: Document Interchange between Suppliers and Customers (SEMI E36)
Wednesday, July 16, 8:00 am-12:00 noon
San Francisco Marriott
The on-line era offers new possibilities for communication between the creators and users of documentation, including information search-and-retrieval functions. This tutorial will examine the issues involved and the SEMI E36 specification for electronic documentation interchange.
Registration Fee: $175
Tuesday
BGA Technology Conference
Tuesday, July 15, 9:00 am-5:00 pm
San Jose Convention Center
A panel of experts offers a day-long comprehensive review of ball-grid-array packaging, including design, materials, interconnect technologies, applications, and new markets. The agenda includes advanced packaging materials, cost efficient assembly, advanced multichip packaging, and multilayer packages.
Registration Fee: $395
Plastic Package Manufacturing Conference
Tuesday, July 15, 9:00 am-5:00 pm
San Jose Convention Center
Improve your ability to implement solutions on the production floor or design lab with this comprehensive, day-long series of presentations by experts on traditional plastic surface mount packaging.
Registration: $395
Wednesday
Packaging Materials Conference
Wednesday, July 16, 9:00 am-5:00 pm
San Jose Convention Center
This conference is devoted to recent advances in packaging materials technology. A series of presentations by experts will include examinations of the use of silica-coated aluminum nitride in high-performance molded packages, new developments in bonding wire and tool materials for fine pitch applications, high-density flexible substrates, epoxies for flip-chip underfill, and a tutorial on product-oriented microelectronics packaging interconnection.
Registration: $395
Product-Oriented Microelectronics Packaging and Interconnection Tutorial -
Emphasis on TSOP, QFP, PGA, TCP, and BGA
Wednesday, July 16, 8:30 am-5:30 pm
San Jose Convention Center
This product-oriented microelectronics packaging and interconnect-related tutorial will examine fundamentals, recent advancements, and trends. Special emphasis will be placed on single-chip packages, including thin-small-outline package, quad flat pack, pin grid array, tape-carrier package, and ball grid array. The tutorial will also look at product-oriented case studies and emerging technologies.
Registration: $495
Process Parametric Test Workshop
Wednesday, July 16, 8:00 am-12:00 noon
San Jose Convention Center
This workshop focuses on how you can maximize the value of your parametric testing data to improve yields. How to get accurate results from low-current measurements will be examined as will the integration of testers on the factory floor.
Registration: $295
Workshop on Manufacturing Execution Systems (MES) for Semiconductor Processes
Wednesday, July 16, 8:00 am-12:00 noon
San Jose Convention Center
Users and vendors will show how they improve equipment utilization and yields using MES. The roles of control and automation systems and fully integrated architecture will be examined. A panel discussion will look at MES and customer issues.
Registration: $195
Test Cost Reduction Workshop
Wednesday, July 16, 1:00-5:00 pm
San Jose Convention Center
This workshop will explore different perspectives on how to improve the cost of ownership of IC testing. A panel discussion will explore audience questions and provide time for open debate.
Registration: $295
Thursday
International Packaging Strategy Symposium
Thursday, July 17, 8:30 am-5:00 pm
San Jose Convention Center
This symposium aims to help IC device manufacturers, systems integrators, and equipment and materials suppliers coordinate the development of new products and technology, while remaining focused on the needs of end users. The goal is to enhance information sharing and cooperation. Future economic and technological trends will be discussed. Presentation topics will include semiconductor packaging in Japan, flip-chip packaging in Europe, and the packaging materials and equipment supplier infrastructure in Korea.
Registration: $395
Design, Materials, Process, and Reliability of Advanced Packaging Technologies Tutorial: Emphasis on BGA, CSP, DCA, and Flip Chip
Thursday, July 17, 8:00 am-5:00 pm
San Jose Convention Center
This tutorial will explore the critical design, materials, process, and reliability issues of low-cost and high-density packaging. It aims to improve your skills in selecting cost-effective packaging design and high-yield materials for interconnective systems. Lead technologies will be emphasized, including ball grid array, chip scale package, direct chip attach and flip chip.
Registration: $495
Sixth Annual Manufacturing Test Conference - Session 1: Strategic Management of Test
Thursday, July 17, 8:30 am-12:30 pm
San Jose Convention Center
Industry speakers will share their perspectives on the advantages and disadvantages of in-house vs. outsourced test economics and the strategic management of test economics. Speakers will discuss actual strategies, outcomes, and forecasts for change in the next five years. A panel discussion will examine test models, time-to-market, and quality and reliability issues.
Registration: $295
Polymers for Electronic Packaging Tutorial: Materials, Process, and Reliability
Thursday, July 17, 8:00 am-12:00 noon
San Jose Convention Center
This tutorial is designed to improve materials suppliers` and users` understanding of the inorganic and organic polymers used in electronic packaging, including the role polymers play in adhesives, encapsulants, insulators, dielectrics, molding, and conducting elements for interconnects. An overview of packaging technology, the reliability of polymeric materials testing, and recent advances will be discussed
Registration: $295
Friday
CSP-Related Technologies
Conference
Friday, July 18, 9:00 am-12:00 noon
San Jose Convention Center
Learn about the latest trends in chip scale
packages (CSPs) and related technologies. New applications and packages will be emphasized, including the use of CSPs in PC cards, standards and applications for CSP devices, and the development of fine-pitch microstar ball grid arrays. This course will be of interest to manufacturing, engineering, and design managers; senior assembly/
manufacturing and design engineers; and test, quality, and reliability personnel.
Registration: $295
Sixth Annual Manufacturing Test Conference - Session 2:
TAP Integration, Automation, and ATE Standards
Friday, July 18, 8:30 am-12:30 pm
San Jose Convention Center
This conference reviews SEMI`s efforts to establish standards and benchmarks for chip-testing equipment, which started in 1995. The progress of five task forces formed to create standards will be reviewed. A panel discussion will be dedicated to the need for standards amidst the push for back-end integration and automation. The conference will include audience participation and questions.
Registration: $295
Second Advanced Substrate Test Workshop: Are we Ready for 5000 Plus Open/Short Tests
per Second?
Friday, July 18, 8:00 am-12:00 noon
San Jose Convention Center
Attendees at the first Advanced Substrate Test Workshop held at SEMI in October 1966 requested this year`s second session to continue the examination of the testing requirements for large format MCM manufacturing capabilities. This session looks to communicate the necessary requirements to test equipment companies for the development of testing capabilities that will fill the shortfall of high-speed opens/shorts testing of unpopulated advanced substrates.
Registration: $295.
Semiconductor Processing
Technology
Thursday, July 10 - Saturday, July 12,
8:00 am-5:00 pm
ANA Hotel San Francisco
Also: Sunday, July 20 - Tuesday, July 22,
8:00 am-5:00 pm
San Jose Hilton and Towers
This three-day seminar is a good opportunity for a range of professionals in the semiconductor industry to increase their understanding of semiconductor processing technology. The seminar aims to teach participants to distinguish key pieces of semiconductor fabrication equipment. It will provide insight into equipment operations and the role of equipment and process materials in the overall manufacturing process. Case studies of materials and equipment problems will be reviewed.
Registration: $1150
How to Successfully Manage New Product Introductions
Friday, July 11 - Saturday, July 12,
8:00 am-5:00 pm
ANA Hotel San Francisco
This day-long management tutorial provides a powerful understanding of the dynamics of new product introductions with a dual perspective. It will examine market criteria for product success and the internal ramifications product introductions have on companies. Participants will
be asked to create product introduction plans using industry case studies.
Registration: $1195
Ergonomic Design for
200- & 300-mm Wafer Processing
Sunday, July 13, 8:30 am-5:00 pm
Monday, July 14, 8:30 am-12:30 pm
ANA Hotel San Francisco
Also: Friday, July 18, 8:30 am-5 pm
Saturday, July 19, 8:30 pm-12:30 pm
Fairmont Hotel San Jose
Industry leaders and organizations have combined forces to help present this 2-day course on how to design 200- and 300-mm wafer processing equipment that is compatible with operator comfort, convenience and safety and addresses maintenance, reliability, and productivity considerations. The course outline includes workstation design principles; lifting strength and materials handling; and controls and displays.
Registration: $695
Winning Customer Satisfaction
Sunday, July 13, 8:30 am-5:30 pm
Monday, July 14, 8:30 am-4:30 pm
ANA Hotel San Francisco
Improve your interpersonal skills during this two-day session, aimed at helping technical professionals adapt to people-oriented sales, service and marketing tasks. Session topics include: keeping commitments; defusing anger; avoiding defensiveness and burnout; creating positive impressions; making customer presentations; developing and maintaining credibility; and overcoming customer resistance.
Registration: $995
SEMI Enabling Products and Services Section Meeting
Monday, July 14, 8:00 am-9:30 am
San Francisco Marriott
This EPSS session is devoted to SEMI members who supply products and services to the `front end` of the semiconductor industry. EPSS sessions are held on a regular basis in conjunction with SEMICON shows in the US. This session continues the current push to improve communication between suppliers and their customers - chip manufacturers - for the benefit of both.
Registration: free (Preregistration is not required. To guarantee your seat, please arrive 15 minutes prior to the meeting.)
CE Marking Forum/International Compliance Update
Monday, July 14, 8:30 am-4:30 pm
San Francisco Marriott
European Union Directives that require "CE" marking on a wide range of products entering the European Member States are aimed at ensuring compliance with safety and environmental standards. This forum will focus on three of the directives as they pertain to semiconductor manufacturing equipment: the Machinery Directive; the Electromagnetic Compatibility Directive; and the Low Voltage Directive. Compliance, compliance alternatives, customer views and other international environmental health and safety issues will be discussed as well.
Registration: $395
Establishing Semiconductor
Equipment Reliability Tutorial
Monday, July 14, 8:00 am-5:00 pm
San Francisco Marriott
This tutorial is aimed at helping suppliers and users of semiconductor equipment assess the reliability of their equipment. Without relying on mathematical theory, the tutorial will cover basic definitions, reliability measures, the SEMI E10 Standard, performance metrics, reliability testing and how to assess reliability improvement programs.
Registration: $495
Understanding and Using Cost of Ownership Offered Twice
Monday, July 14, 9:00 am-5:00 pm
Tuesday, July 15, 8:00 am-4:00 pm
ANA Hotel San Francisco
Also: (Assembly and Packaging Emphasis)
Thursday, July 17, 9:00 am-5:00 pm
Fairmont Hotel San Jose
Gain a theoretical foundation and practical understanding of the cost of ownership concepts and applications used by leading IC manufacturers to evaluate equipment purchases. From the concepts` history all the way to software applications and potential misuses, this seminar explores this powerful financial tool as it pertains to both equipment manufacturers, equipment users and materials suppliers.
Registration: $550
SEMI Chemical and Gas Manufacturers Group Meeting
Monday, July 14, 10:45 am-12:15 pm
San Francisco Marriott
This Chemical and Gas Manufacturers Group (CGMG) session is devoted to SEMI members who supply chemicals, gases and related products to the semiconductor industry. CGMG sessions are held on a regular basis in conjunction with SEMICON shows in the US. Group members are focused on a program to generate and disseminate special market statistics for chemicals and gases among participating companies.
Registration: free. (Preregistration is not required. To guarantee your seat, please arrive 15 minutes prior to the meeting.)
Equipment and Materials Market Briefing
Tuesday, July 15, 8:30 am-9:30 am
Moscone Center
Also: Thursday, July 17, 8:30 am-9:30 am
San Jose Convention Center
Senior marketing professionals will want to attend this one-hour briefing by Elizabeth Schumann, a SEMI senior market analyst, who will share her mid-year assessment of global semiconductor equipment and materials markets.
Registration: $125
Improving Equipment Productivity
Tuesday, July 15, 9:00 am-5:00 pm
ANA Hotel San Francisco
This tutorial will help wafer fabrication equipment vendors keep up with their customers` intensified focus on equipment efficiency and COO. Tutorial participants will gain the tools necessary to benchmark their equipment and communicate its performance advantages to potential customers.
Registration: $550
Competitive Marketing Strategy: The Lanchester Equation
Tuesday, July 15, 9:00 am-5:00 pm
ANA Hotel San Francisco
The Lanchester Equation is a sales and marketing strategy developed by the Japanese in 1960s and based upon the theory of mechanized warfare published by F.W. Lanchester in 1916. Military equations are used to develop market strategy from hard data. Registration: $550
Forecasting Techniques for the SEM Industry
Tuesday, July 15, 1:00-5:00 pm
San Francisco Marriott
This seminar will teach you to locate your position in the business cycle, forecast business cycle turning points, and acquire practical forecasting skills and strategies to follow during each cycle stage. Quantitative forecasts of front-end and ATE equipment for 1997 and 1998 will be presented and analyzed.
Registration: $300
Global 300-mm Transition Status, Timing & Related Issues - Session 1
Wednesday, July 16, 8:00 am-12:00 noon
San Francisco Marriott
This is a comprehensive update on the transition to 300-mm wafers and the activities of the 300-mm focused consortia and regional organizations. A progress report will also be given on the status of the development of 300-mm wafer, carrier and interface standards.
Registration: free (Preregistration is not required. To guarantee your seat, please arrive 30 minutes before the meeting.)
FPD Manufacturing Economics & Technology Update
Wednesday, July 16, 9:00 am-5:00 pm
San Francisco Marriott
The agenda includes market overviews and forecasts for both FPDs and the materials and equipment needed to manufacture them. The seminar will also provide an intensive look at the current state of FPD manufacturing.
Registration: $395
Benchmarking: A Tool for Success
Wednesday, July 16, 1:00-5:00 pm
San Francisco Marriott
The agenda includes a specialized look at how benchmarking is applied to semiconductor fabs, assembly and packaging, and flat panel displays.
Registration: $295
Global 300-mm Transition Status, Timing & Related Issues - 2
Wednesday, July 16, 1:30-5:00 pm
San Francisco Marriott
How can wafer fabrication facilities be built to absorb technical changes that demand flexibility and expandability? Presentations from multiple disciplinary perspectives will examine the question and a roundtable discussion will follow.
Registration: free (Preregistration is not required. To guarantee your seat, please arrive 30 minutes before the meeting.)
Digital IC Test Engineering Tutorial
Wednesday, July 16, 8:00 am-5:00 pm
San Jose Convention Center
Users of VLSI test systems will want to attend this tutorial dedicated to the latest developments in state-of-the-art testers. Real-world problem solving by test engineers will be emphasized. Tutorial topics will include accuracy/calibration, large pattern set management, spec-sheet-to-test-program conversion, power supply measurement, IDDQ, and advanced analytical tools.
Registration: $475
Standards Workshops
Standards workshops are open to all interested parties at no charge and do not require preregistration. In order to guarantee your seat, please arrive 30 minutes before the workshop begins.
300-mm Wafer Workshop
Monday, July 14, 8:00 am-12:00 noon
San Francisco Marriott
Seventh in a series, this workshop will focus on prime wafer specifications for dimensions and other critical properties.
Cost of Corrosion Workshop
Monday, July 14, 1:00-3:00 pm
San Francisco Marriott
The impact of corrosion on semiconductor device fabrication processes will be assessed from multiple perspectives.
Gas Purification Cost of Ownership (COO) Workshop
Monday, July 14, 3:00-5:00 pm
San Francisco Marriott
This workshop will describe COO models as they are applied to gas purification capital equipment and assess their value.
Calibration of APIMS Workshop
Tuesday, July 15, 5:00-6:30 pm
San Francisco Marriott
Learn about the calibration techniques that are critical to the success of atmospheric pressure ionization mass spectrometry (APIMS).