Thermal test chip guideline

06/01/1997

Thermal test chip guideline

This EIA/JEDEC publication titled "Thermal Test Chip Guideline (Wire Bond Type Chip)" (EIA/JEP129) describes design requirements for wire-bond-type semiconductor chips used for thermal resistance listing of IC packages. The document provides specific guidelines for chip design, but allows flexibility in materials and layout. Also detailed are sensor design and placement, heat-source-coverage area specifications, wire-bonding considerations, and surface properties for the chip. Price: $31. Global Engineering Documents, Englewood, CO; ph (US) 800/854-7179, (non-US) 303/397-7956.