The early days of CMP
05/01/1997
The early days of CMP
Michael A. Fury, Rodel Inc., Newark, DE
Numerous individuals participated in countless teams in the process-development efforts for CMP at IBM, other chipmakers, and SEMATECH. Many of these people still practice their CMP art at chipmakers and suppliers around the world; some have retired or moved on to a greater Fab; some of the original pioneers remain at IBM. This article recalls some of the events of the early years of CMP. Because of space limitations and for fear of omitting key contributors, the author does not purport to honor by name all those responsible for the invention, development, and evolution of CMP, the most rapidly growing segment of the semiconductor process equipment market today.
We live in an age where new technologies and new applications for them are commonplace. It is not so rare a privilege to witness the dawn of revolutionary changes in the way people live, work, and communicate. It is still, however, a rare and humbling experience to play a role in such a revolution. In the world of semiconductor manufacturing, chemical-mechanical planarization (CMP) has rapidly evolved from an unthinkable cleanroom abomination to a critical process technology without which 0.25-?m devices would be difficult to realize except on paper.
Early days at IBM
IBM has long taken pride in its ability to provide an environment that fosters invention and innovation. Many basic technologies taken for granted in the semiconductor world have their roots at Big Blue. It has not been uncommon for scholarly research to burst aflame with a creative spark, resulting in new and exciting processes or designs that have been praised and embraced by all. Taking a very old and inherently dirty technology such as polishing and applying it to leading-edge chips evoked a somewhat different reaction: "You want to take my wafers and do what?!?"
The first players.The original IBM development work was done in East Fishkill, NY, around 1983, in what was referred to as the Base Technology Lab, a bridge between fundamental research and pilot-line development. Like many revolutionary developments, the use of CMP in multilevel metal technology was the result of a hallway conversation. This particular one took place between Bill Guthrie (now at Applied Materials), Bill Patrick (IBM, retired), Charles "Bud" Standley (IBM, retired), and Kathleen Perry (now at Motorola) and went something like this:
"I`m working on this new project where you actually polish a wafer."
"Hey, you know what that might work for? Multilevel metal planarization."
"Well, I`m working on metal deposition and have some wafers with trenches in oxide that we could fill and you could try polishing."
"Let`s do it!"
Thus the first CMP experiments were born. Much of the early direction came from senior engineer, Bud Standley. Bud loved nothing better than to hang out with the young engineers and dream up new ideas, "mentoring the young`uns" as he called it. He was a man of many hobbies; one of them was telescopes and lens polishing. Folks elsewhere in East Fishkill were also polishing silicon wafers. Buying someone there a cup of coffee could go a long way in those days toward borrowing some time on a polisher for experiments.
Bud was also responsible for naming the polishing technologies. A short while after that first hallway conversation, Bud suggested, "You know what we`re going to call these new processes? Damascene and cloisonn?." "OK, Bud, where did that come from?" Bud knew about all sorts of things, including jewelry making. Damascene was the name for a jewelry-making process whereby a pattern was made in a mold. Metal was poured into the pattern and then polished until the pattern was exposed. The reverse of this was the cloisonn? process, where the metal pattern was made first, then enamel was poured over the metal and polished until the metal pattern was exposed. Geraldine Schwartz (IBM, retired) and Paul Schaible (IBM, retired) joined the original group and led the cloisonn? process integration efforts. Due to relative ease of process integration, damascene found its way into many more applications.
There remains, of course, the memory of an unnamed IBM manager who called one of the original inventors into his office and said, "I have a new project I would like you to work on. It will be a much better use of your time. That polishing work is just never going to go anywhere."
Internal proliferation: East Fishkill, NY; Burlington, VT; Yorktown Heights, NY. By the mid-1980s, the time had come to move this very private program out of the East Fishkill R&D laboratory and into the product pilot lines to see if promises could be delivered on real device wafers. The first four-level metal structures, designed for mainframe bipolar logic chips in East Fishkill and Poughkeepsie, NY, would be difficult without a good planarization scheme. At the same time, Burlington was committed to deliver both a four-level CMOS logic chip and a dense, two-level design for DRAM. Although the two locations operated with relatively little awareness of each other`s activities or rate of progress, the development of CMP was underway.
In East Fishkill, the interconnect process integration team had to choose between two competing planarization schemes, ion milling and CMP. The ion-milling process was familiar to semiconductor process engineers; was just another vacuum chamber; and was clean. It would have been a shoo-in if only it had planarized a greater number of wafers/hr to a greater degree of planarity. However, the outrageous CMP alternative did so much better that it could not be denied. Of course, a good wafer was one with greater than 50% 1-s removal nonuniformity on a 125-mm wafer with 10-mm edge exclusion, and a removal rate over 1000 ?/min. Work proceeded on Strasbaugh tools inherited from the R&D group.
In Burlington, development was driven by DRAM engineering teams, who had learned to be very cost- and productivity-conscious when IBM`s internal DRAM product had been forced to compete with outside DRAM sources for IBM`s own business a few years earlier. In Burlington, there was quite a bit of effort, not evident in the East Fishkill program, to extend pad life, make more efficient use of slurry, and improve equipment reliability commensurate with other fab hardware. One turning point for the industry occurred when Burlington decided to opt for the Westech tool. This turn is responsible for the commanding lead in installed base that Westech (now IPEC Planar) still enjoys.
Researchers in Yorktown Heights began working with both the East Fishkill and Burlington groups, and they put an additional CMP development group in place. It was clear within the corporation that CMP would be a major process technology.
Work on CMP for metallization was well underway by the mid-1980s. CVD tungsten was the only process capable of void-free filling of aspect ratios of 0.7 or greater, but it required a tungsten etch-back process. Those already attuned to the potential of CMP embarked on the parallel development of a tungsten CMP process. By this time, in 1987, each of IBM`s three East Coast sites had well-established CMP programs. Therefore, three somewhat independent tungsten CMP efforts were launched to satisfy the local program needs of East Fishkill, Burlington, and Yorktown.
The process developed in East Fishkill was the first to the finish line in 1988, satisfying the most needs with the fewest critical deficiencies, and was quickly adopted by the Burlington and Yorktown pilot lines. Burlington had the first opportunity to do a direct comparison between tungsten etch back and CMP, using a DRAM test vehicle. A gain of several points in final test yield differentiated CMP as the clear process of choice. For all its shortcomings, CMP actually eliminated some types of defects created in other process steps.
Confidentiality plus. Throughout the 1980s, IBM`s behavior regarding CMP was governed by its desire to hold the technology secret. Even within IBM, discussion of the CMP project was limited to those with a need to know. These policies led to some rather strange behavior by IBM personnel attending technical conferences and supplier meetings. The air of "I know something you don`t know" was not concealed well enough, and rumors began to grow. Workshop attendees criticized IBM representatives for furiously taking notes throughout the discussions, but not verbalizing a single nugget of wisdom to share with the group.
As a consequence of the tight veil of secrecy around CMP, many suppliers participating in the birth of this industry were totally unaware of its existence. Neither Strasbaugh nor Westech had any idea why custom modifications were being made to their equipment. This was not a reliable indicator of the changes afoot, however, since IBM at that time had a penchant for never buying off-the-shelf equipment. Elaborate engineering changes were the norm. The slurry and pad manufacturers were unaware of how their products were being used. It would be several years before adequate data sharing between users and suppliers would address deficiencies in the original processes.
Controlled proliferation
The role of the PC. IBM had entered the PC market by 1983 as the 200-pound canary. Its fortunes in this market were linked to the health of its key component suppliers, particularly for microprocessor and memory chips. Having chosen the Intel microprocessor line for its PC strategy, IBM was sufficiently motivated to discuss its chip interconnect technology, including CMP, with Intel. Similarly, the Japanese dominance of the DRAM market was not a great comfort to the US semiconductor infrastructure. This motivated an interconnect technology interaction with Micron Technology Inc., Boise, ID. Both companies expressed initial shock regarding the crazy use of CMP. How could IBM have violated the rules of cleanroom contamination control, of deterministic process control, and of innumerable sacred fab cows, and implemented this bad boy in manufacturing? Despite its blemishes and process immaturity, the fact was (and remains today) that CMP could deliver a product result that no other process could match. Each of these companies soon embarked on their own CMP process-development programs, contributing to today`s diversity of methods and applications.
The role of SEMATECH. In 1988, IBM agreed with SEMATECH to disclose its process integration scheme for multilevel interconnects. Details were sparse, but the equipment list from IBM included a Westech polisher. The SEMATECH engineers suspected that this might have been related to the frustrating silence maintained by IBM participants in earlier workshops. Thus, a CMP project was created at SEMATECH.
SEMATECH`s first program focused on demonstrating a process on the Westech tool. A second program focused on improving tool reliability. The third SEMATECH program coincided with a major change in Westech management and focused on SEMATECH`s major objective at the time, the creation of a stronger US equipment supplier infrastructure. During this program, many key Westech personnel were brought in who had a substantial effect on the company known today as IPEC Planar. These programs resulted in the IPEC 472 tool.
At the same time, CMP was spawning a new industry that extended beyond Westech. A much more global approach to CMP was put into place. Programs were started with key consumable suppliers like Rodel and Rippey, and a tool benchmark program looked at all of the tools that were available in the industry. In addition to its internal programs, SEMATECH established a number of SEMATECH Centers of Excellence (SCOE), managed by the Semiconductor Research Corporation (SRC). One such SCOE was established at Rensselaer Polytechnic Institute (RPI) in Troy, NY, for multilevel interconnects. SEMATECH`s member companies directed that a program in CMP be included in the scope. RPI has since produced the first PhD graduates in the world with a degree focus in chem-mech polishing for semiconductor interconnects.
Rapid proliferation
By the early 1990s, everyone in the US was struggling to figure out what to do with the great promise of CMP. Fabs outside the US had heard about it, and were making inquiries. Graduate students were designing thesis projects around it. The migration to smaller devices elevated CMP from a curious option to an immature technology on the critical path. All of these things furthered the development of CMP as a viable volume-manufacturing technology.
Two situations accelerated the proliferation of CMP throughout the industry. The first was the downsizing at IBM in 1990-1994. Engineers and technicians with experience in CMP found themselves with lucrative job offers and severance packages from IBM. The second was experienced at SEMATECH. At the end of a typical two-year assignment at SEMATECH, assignees often found that they had grown in the job and had become so comfortable working in the industry-wide environment, that it was hard to go home again. Many opted for jobs in the supplier industry, markedly strengthening the supplier infrastructure (see figure).
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One tradition of the SEMATECH CMP team in the early days was to steal the office name tags of any engineers prior to their departure. The name tags were added to the collection of all of the previous assignees. Looking over this name plate memorial is like looking at a Who`s Who of the CMP industry.
Today, relatively few practitioners of CMP do not have, or did not recently have, alumni of IBM, Intel, Micron, or SEMATECH among their ranks. Many alumni continue to work in fabs; a number of them are now suppliers to their colleagues in the fabs. There are more fab users and more suppliers from whom to choose if you want to pursue a career in CMP. At the same time, there is a current shortage of graduate and postdoctoral students doing thesis work on CMP. The industry is so hungry for any level of experience in this still-new process, that university researchers are being lured from academia after only six- to twelve-months` experience, regardless of whether they have completed their intended degree program.
The CMP industry family tree: users, equipment, and consumables.
Looking to the future
Because CMP is clearly on the critical path for achieving device technologies smaller than 0.35 ?m, the current rapid growth will continue until the first level of process capability and manufacturing capacity is achieved across the industry. At that point, CMP will fall back with the pack and follow the growth of the semiconductor equipment and consumable industry as a whole. Those who recognize their role in creating and spreading this critical and profitable industry can continue to run into each other at meetings and conferences and say, "We done good."
Acknowledgment
The author would like to thank the many colleagues who shared their stories and memories on the early days of CMP.
MICHAEL A. FURY received his BS degree in chemistry from Iowa State University and his PhD in physical chemistry from the University of Illinois, Urbana. He has held engineering and management positions in semiconductor process development and manufacturing at IBM Corp., and was director of research at Rippey Corp. He joined Rodel Inc. in 1995, where he is global industry manager for pla-
narization. Rodel Inc., 451 Bellevue Rd., Newark, DE 19713-3431; ph 302/366-0500, fax 302/455-1216, e-mail [email protected].