Packaging- more than meets the eye

04/01/1997

Packaging - more than meets the eye

The semiconductor industry will face numerous challenges as we push further into the submicron regions in terms of lithography, CMP, CVD, etching, ion-implantation, and the like. Materials and gases, as well as cleanroom science and measurement, will pose inscrutable problems as new standards and rules apply. Additionally, the move to 300-mm wafers will impact these technologies and create further demands on both wafer-handling equipment and the development of new materials and processes. Not left out of this picture by any means is packaging. It will have its own significant problems to solve as we enter these new and demanding technological frontiers.

These new reaches for packaging suggest an increasingly critical role for the technology. New demands will come from requirements for more leads per chip (hence smaller bonding pitch), shrinking die and feature sizes, and higher MHz microprocessors that generate more heat, thus requiring advanced heat dissipation designs. In addition to these demands, the more stringent electrical requirements must not be compromised by the packaging. All of these considerations must be met and, as usual, placed in relation to the cost that packaging adds to the semiconductor-manufacturing food chain.

Just recently the story emerged of Intel`s pending Tillamook 200-MHz and 233-MHz MMX Pentium chips generating a more-than-expected 10 W of power as opposed to current 4- to 6-W chips. These chips are being designed for mobile use, and 10 W of heat require packaging designs with heat sinks or fans that can handle these conditions. This leads to battery-life questions in portable devices and further expense. This is just one example of the ripple effect that could easily end up at the doorstep of the packaging designer and could make the difference between a successful launch of a new chip and an also-ran product.

On a recent trip to Chandler, AZ, I stopped in to chat with Amkor/Anam about packaging issues and how the company saw its future challenges. It was obvious this worldwide supplier of packaging technology is acutely aware of the demands that will be made on the packaging vendors. Gil Olachea,VP of marketing communications, pointed out the areas that new chip technologies will stress: bond pad pitch, increasing operational speed (frequency), power dissipation, I/O vs. footprint, and signal vs. noise isolation/suppression, among others.

The challenge to packaging companies is formidable. Olachea pointed out that, "Packaging is becoming increasingly important due to the limits facing the market in die feature size approaching sub-0.10-micron lithography. The last five years have demonstrated this point with the proliferation of packaging to address the issues traditionally solved at the chip level." His concerns are for material sources and equipment capabilities for advanced packaging and performance.

These problems are probably good news for the packaging industry, which projects a healthy 9-13 percent growth over the next three years. This includes growth in all facets - leadframes, ceramic packaging, bonding wire, and resins for encapsulation and die attach. With packaging expenditures accounting for more than 40 percent of total materials spending, this could provide a strong pillar for materials growth in the next year.

We don`t know all the demands that will be made on packaging, as the future of this volatile market defies prediction. But with the rapid evolution to smaller geometries, packaging will have to be both smart and quick to keep pace.

One thing we do know: the packaging industry has its work cut out for it as we head into the new millennium of semiconductors.