IS Scanner better than a stepper
03/01/1997
Is a scanner better than a stepper?
William H. Arnold, Advanced Micro Devices, Sunnyvale, California
Quarter micron optical lithography introduced step-and- scan tools to IC manufacturing. While scanning lithography has a few obvious advantages, including larger image fields and scan averaging of aberrations, the scanner also suffers from increased system complexity and cost, synchronization, and vibration errors, and, in cases where the full field size is not used, reduced throughput.
Scanning projection aligners were the dominant lithography exposure tool in the late 1970s and early 1980s. More than 2500 of the Offner 1X design [1] were built and sold by Perkin Elmer Corp. under the name Micralign. After the difficulties of making good 1? masks containing all the chips that covered the wafer became insurmountable, lithographers turned to the wafer step-and-repeat camera, first marketed and sold widely by GCA Corp. The stepper used a 10?, then later a 5?, reticle containing one or more chips, which was stepped around the wafer to fill it. If the reticle was perfect, i.e., had no printable defects, then there was no yield loss due to mask defects. Yields soared relative to scanning projection aligners. Though it was not universally accepted at first [2], the reduction stepper, operating first at g-line (436 nm), then at i-line (365 nm), and now at 248 nm, has dominated IC fabrication for more than 10 years.
As chip sizes have grown and minimum feature sizes have shrunk, however, stepper lenses have become vastly larger and more complex. The cost of these lenses now exceeds $1 million. Stepper manufacturers have begun to build scanning wafer steppers, hybrid tools that scan a reduction reticle through a small, well-corrected image field before stepping to the next location on the wafer. These tools can use much smaller image fields than conventional steppers, helping the lens manufacturer to achieve much lower wavefront deviations in the lens pupil plane. The scanning mechanism also allows some aberrations to be reduced through "scan averaging." Thus, these new scanners achieve superior control over both linewidth and overlay.
Figure 1. i-line lens pixel count vs. time.
Figure 2. 248-nm lens pixel count vs. time.
Trends in microlithographic lenses
To sustain the simultaneous increase in chip sizes and reduction of minimum feature sizes, designers have been forced to develop lenses with larger field sizes, higher numerical apertures, and shorter operating wavelengths. Figures 1 and 2 plot the lens pixel content vs. year of introduction for i-line and 248-nm lenses from five different manufacturers. The pixel content for a given wavelength (l) - the field size divided by the minimum square element that the lens can project, set here as 0.8 (l/NA) - is limited by the maximum field size and NA achievable while meeting the stringent aberration requirements. Large fields and NAs require large glass elements, the cost of which increases rapidly with diameter. At some point, which seems to have happened in the 22-mm2 range, a full-field stepper lens becomes too expensive. Markle [3, 4] was one of the first to show that step-and-scan tools could overcome the pixel content limit of full-field steppers.
With steppers, for a given generation of lens design, the product of the NA and the field diameter is approximately a constant. One can increase the NA if the field diameter is reduced, or the field diameter can be increased at the expense of the NA. Increasing both NA and field size typically requires new lens designs, an exercise that has become increasingly difficult with the minimum feature size reduction required to sustain Moore`s Law.
The lensmaker must control such aberrations as spherical aberration, field curvature, astigmatism, coma, and distortion over the full image field. Aberrations increase with increasing field diameter and it becomes impossible to balance their behaviors beyond a given field radius.
Microprocessor die sizes are currently in the 100 to 200-mm2 range, and the rate of increase has slowed. Gordon Moore recently estimated the cost of building microprocessors as in the neighborhood of $1 billion/acre of processed silicon, and has stated that this cost effectively limits the maximum die size [5]. Thus, manufacturers build more functionality (add more transistors) by shrinking minimum feature size and adding interconnect layers in addition to increasing die size.
Meanwhile, DRAM production continues to drive stepper technology. Though very profitable, the worldwide microprocessor business is <20% of the worldwide memory business. DRAM die sizes will continue to grow, though the current emphasis is on shrinking minimum feature and minimum cell size at a more rapid rate.
Scanners are not required for 256-Mbit DRAM production, since two die can be printed in a standard 22-mm2 field. The cost of making full-field stepper lenses bigger than about 25 mm2 seems prohibitive, however, so scan-and-repeat tools are needed to print more than 1-Gbit DRAM/field. With 4? reduction, reticle size must grow even more to extend pixel count to the levels required for 4- and 16-Gbit DRAM production.
Why have scanners come back?
If DRAM die size increases aren`t yet enough to justify the use of scanners, why are they being introduced now?
The step-and-scan principle allows one to use a lens corrected over a smaller image field than is required on a stepper. Since the static image field size on the scanner is smaller than the full-field of the stepper, several subtle but important differences improve imaging and overlay performance.
Scan-and-repeat systems may be grouped in two general classes. One type, represented by the original Perkin Elmer Micrascan I [6, 7], uses a catadioptric projection lens, i.e., a lens with both refractive and reflective elements. Since Perkin Elmer sold this unit to SVG and other investors in 1990, the new business, SVG Lithography, has introduced two new generations: in 1993, the MSII, a 4? reduction, 0.50-NA lamp-based tool for 0.3-?m production; and in 1996, the MSIII, a variable NA (0.6 max), KrF excimer laser-based tool to address 0.25 ?m and below. The catadioptric lens design in the MSII features a large beamsplitter cube: a mirror provides most of the system`s reduction and gives wide enough color correction (a few nm) to allow use of an arc lamp source [8]. The MSIII features the same lens form, but the bandwidth requirement shrank to 50 pm as the NA was increased to 0.6 and the field size to 26 ? 32.5 mm. Thus, an excimer laser source is needed to provide enough light for resist exposure [9]. The Micrascan III projection optics scheme is shown in Fig. 3 [9].
In the second type of scanner, [10, 11] a conventional stepper with a vertically mounted, fully-refractive lens is modified to have scanning reticle and wafer stages, along with new mechanical systems for isolation of the optical column. For example, the Nikon NSR-S201A, introduced in 1995, features a 0.6 NA lens with a 25 ? 33-mm image field, and uses a highly-narrowed (~1 pm) KrF excimer laser for exposure (Fig. 4) [12, 13].
US microprocessor manufacturers (IBM, Intel, Motorola, AMD) have found that across-chip linewidth variation (ACLV) at the gate layer is one of the key determinants of processor speed [14]. The tighter the control over channel length, the tighter the distribution of processor speeds about the mean. Since processor speed is a primary determinant of the selling price of the part, these IC makers have worked hard to reduce ACLV. Scanning steppers such as the Micrascan II have demonstrated very low values of ACLV for isolated and semi-isolated gate widths down to 0.25 ?m [15, 16].
This improvement in ACLV appears to be due, in part, to the reduced image field of the scanner, which makes it easier to control aberrations such as field curvature and astigmatism. The elements in the lens can be clocked (i.e., rotated with respect to each other) and spaced during assembly to minimize aberrations over the smaller field. Also, the scanning mechanism allows averaging of several aberrations [17].
Goodall and Huff [18] argue that a scanner can respond to wafer flatness deviations more effectively than a full-field stepper, due to the scanner`s ability to adjust focus and tilt dynamically. In practice, however, not every scanner fully implements this capability.
Figure 3. Micrascan III projection optics [22].
Figure 4. Nikon NSR S201A scanning stepper [23].
New problems with scanners
Scanners also bring new problems because of the complex mechanical interaction of the wafer and reticle scanning stages with the rest of the scanner body, and most importantly, with the projection lens. High throughput rates require high speed, high acceleration synchronized scanning stages. Yet, to achieve high resolution and tight overlay control, the projection optics must remain as motionless as possible. Resolution and depth of focus can be lost if vibrations in the optical column reduce image contrast.
Overlay errors can arise when the wafer and reticle stages are not fully synchronized and small relative velocity errors occur. Small scan velocity mismatches between reticle and wafer will cause magnification errors along the scan axis. Likewise, small relative rotations between the reticle stage and the wafer stage create scan skew.
Dose control for pulsed-laser scanners is complicated, involving tradeoffs between illumination uniformity and throughput [19]. Since pulse-to-pulse energy variation in excimer lasers is on the order of 5%, multiple-pulse exposures are used to minimize CD variation due to dose nonuniformities. At a given resist dose, the repetition rate of the laser and the energy/pulse establish upper limits on possible scan speeds. In ArF systems, laser-induced glass damage may limit practical scan speeds as well [20].
The 4? reduction and extended field size of scanners also challenges the skills of reticle makers. CD and image placement er
rors are reduced less in size (to 1/4, as compared with 1/5 on most conventional steppers), so smaller reticle defects will now print. In addition, the "care" area over which the tolerances must be met has grown by nearly half. These concerns, coupled with the tendency to use scanners at the most critical layers, make for expensive reticles.
Scanner throughput
Scanners using 6-in.2 reticles and 4? reduction can support maximum field lengths of about 33 mm - a limit set by the maximum writeable area on the reticle, taking into account requirements for mechanical support and pellicle placement. The height of the scan field is set by the diameter of the lens, 22 mm in the MSII, and 25 to 26 mm in newer tools developed for the 256-Mbit DRAM generation [9].
If scanners are mixed and matched with standard steppers and use the same reticle field size, scanner throughput is almost always less than a comparable stepper since the scanner must "overscan" each imaging field [17]. If, instead, the scanner can take advantage of the larger field size, then scanner throughput can exceed that of steppers due to the smaller number of steps necessary to cover the wafer completely. Further, with the advent of larger reticle sizes, such as 230 mm2, scanner throughput can greatly exceed that of steppers.
Scanner insertion into the fab
To date, 4? DUV scanners have been developed for specialized applications requiring the highest resolution or largest field size. In a typical 0.25-?m CMOS logic process, only a few layers out of 20 or more will use the scanner (e.g., the gate and first metal layers). The other layers can be printed on lower cost, 5? i-line steppers, with 22-mm2 fields. This combination typically underutilizes the scanner field size and reduces the scanner`s potential productivity, as nonconcentric field matching and reticle layout issues force it to adopt the limited 22-mm field size.
To address this practical problem, and offer a solution for printing noncritical layers for 0.18-?m technologies, stepper suppliers are developing 4? i-line scanners with the same field size as their DUV counterparts. New fabs may invest in all-scanner photo areas to achieve the best resolution, overlay, and productivity, at the expense of increased capital cost and reduced reliability.
Scanner extensions
Scanners are in development for use with ArF excimer lasers at 193 nm. One full-field 193-nm scanner, designed and built by SVG-L, is based on the MSII lens and body design, and has been operating at MIT Lincoln Laboratories for two years [21]. ArF scanners encounter unique problems with available laser power, glass damage and quality, and productivity. For even larger chip sizes and smaller minimum feature sizes, one solution [10, 11], might use a static field smaller in both dimensions than the scan field and build the image through multipass scanning.
Conclusion
KrF scanning reduction steppers will address the lithography requirements for critical layers in CMOS logic and memory production at the sub 0.25-?m level. At first, scanners are niche tools, used to provide the best resolution and CD control, working with conventional i-line steppers in mix and match mode. With time, i-line scanners and ArF scanners will be introduced and new fabs may purchase all scanners in order to maximize productivity and minimize engineering problems.
Acknowledgments
The author would like to thank Harry Levinson, Anna Minvielle, and Ken Morisaki for many useful discussions.
References
1. A. Offner, "New concepts in projection mask aligners," Optical Engineering, Vol. 14, No. 2, pp. 130-132, 1975.
2. H. Madsen, R. Rice, G. Southers, "Is a stepper really better than a scanner? A 1:1 comparison," Proceedings of the Kodak Interface, pp. 4-11, 1985.
3. D. A. Markle, "The future and potential of optical scanning systems," Solid State Technology, pp. 159-166, September 1984.
4. D. A. Markle, "Submicron 1:1 optical lithography," Semiconductor International, pp.137-142, May 1986.
5. G. Moore, "Microprocessor Forum," Electronic News, p.1 (Oct. 28, 1996).
6. Jere D. Buckley, Charles Karatzas, "Step and scan: A systems overview of a new lithography tool," Proc. SPIE, Vol. 1088, pp. 424-433, 1989.
7. J.D. Buckley, et al., "Step-and-scan lithography using reduction optics," J. Vac. Sci. Technol. B, Vol. 7, No. 6, pp. 1607-1612, Nov/Dec. 1989.
8. D.M. Williamson, "Catadioptric microlithographic reduction lenses," Optical Society of America, Vol. 22, Proceedings of the International Optical Design Conference, ed. G.W. Forbes, 1994.
9. Harry Sewell, "200 nm deep-UV lithography using step-and-scan," Proceedings of Olin Interface, 1996.
10. Kanti Jain, "A novel high-resolution large-field scan-and-repeat projection lithography system," Proc. SPIE, Vol. 1463, pp. 666-677, 1991.
11. S. Wittekoek, "Optical lithography: Present status and continuation below 0.25 micron," Microelectronic Engineering 23, pp. 43-55, 1994.
12. K. Suzuki, et al., "KrF step-and-scan exposure system using higher-NA projection lens," Proc. SPIE, Vol. 2726, pp. 767-779, 1996.
13. T. Farrell, et al., "The viability of conventional high NA KrF imaging for sub-0.25 micron lithography," Proc. SPIE, Vol. 2726, pp. 46-53, 1996.
14. D.G. Chesebro, et al., "Overview of gate linewidth control in the manufacture of CMOS logic chips," IBM J.Res. Develop., Vol. 39, No. 1/2, pp. 189-200, Jan/March 1995.
15. Harry Sewell, "Advancing optical lithography using catadioptric projection optics and step-and-scan," Proc. SPIE, Vol. 2726, pp. 707-720, 1996.
16. P.Y. Yan, et al., "Sub-micron low-k1, imaging characteristics using a DUV printing tool and binary masks," Proc. SPIE, Vol. 2440, 1995.
17. M. van den Brink, et al., "Step-and-scan and step-and-repeat: A technology comparison," Proceedings SPIE, Vol. 2726, pp. 734-753, 1996.
18. Randal K. Goodall, Howard R. Huff, "Wafer flatness modeling for scanning steppers," Proc. SPIE, Vol. 2725, pp. 76-84, 1996.
19. D.H. Tracy, F.Y. Wu, "Exposure dose control techniques for excimer laser lithography," Proc. SPIE, Vol. 922, pp. 437-443, 1988.
20. N. Harned, J. McClay, J. J. Shamaly, "Laser damage impact on lithography system throughput," IEEE J. Selected Topics in Quantum Electronics, Vol. 1, No. 3, 837-840, 1995.
21. M. Rothschild, et al., "193nm lithography," IEEE J. Selected Topics in Quantum Electronics, Vol. 1, No. 3, pp. 916-923, 1995.
22. H. Sewell, Proc. SPIE, Vol. 2726, 1996.
23. Electronics News, p. 8, July 10, 1995.
WILLIAM H. ARNOLD received his BA degree in physics from Hampshire College and his MS degree in physics from the University of Chicago. He joined Advanced Micro Devices in 1980 as a lithography process development engineer and now managers lithography development in the Advanced Process Development department. In 1984, Arnold was named an AMD senior fellow. Advanced Micro Devices, One AMD Place MS78, Sunnyvale, CA 94088; e-mail [email protected].