Issue



MRS: Low-k development, ti/tiN delamination, water, PFCs


02/01/1997







MRS: Low-k development, Ti/TiN delamination, water, PFCs

The Materials Research Society Fall Meeting, held in Boston in early December, provided insights into several evolving areas of device fabrication, including low-k dielectric materials development, Ti/TiN delamination, water use minimization, and PFC replacement.

As researchers work to integrate low-k polymer dielectrics into existing manufacturing processes, thermal stability of the new materials will place serious constraints on metallization schemes, said Carlye Case, of Lucent Technologies` Bell Labs. In a presentation, Case said that conventional W plug metallization requires four high-temperature process steps. PVD Al plugs require only three such steps but one of them, Al reflow, takes place at temperatures above 500?C. CVD Al, while still a high temperature step, would be much ?C more manageable.

For the future, plated copper metallization would be even friendlier for the dielectric, as it requires no high temperature process steps. Furthermore, a Cu damascene process would avoid stringent dielectric gap fill requirements. Future designs may use W plugs at the contact level, Cu for the top power/ground layer, and Al plugs with Al lines in between.

With these considerations in mind, Case compared three organic polymers: BCB, FLARE, and PFCB. All have dielectric constants between 2.3 and 2.7, and similar isothermal weight loss. Only BCB has been commercialized, having been used in MCMs and related applications for several years. Both BCB and PFCB can be cured on either a hot plate, which is cheap and fast but tends to produce more stress, or in a furnace, while FLARE requires a furnace cure. Both BCB and PFCB flow during cure, which could improve both gap fill and planarization properties. These two materials also have good long range planarization, possibly reducing or eliminating the need for CMP.

BCB is compatible with Ti barrier and wetting layers, while PFCB is not; FLARE`s compatibility is unknown.

In conclusion, Case said, none of these materials has been eliminated for PVD Al metallization schemes, but they make CVD Al look attractive. Unfortunately, CVD Al is not yet commercially available and Case anticipates, even when it is, doping with Cu will still be difficult.

According to G. Ramanath, researchers at the University of Illinois at Urbana have now identified the primary cause of Ti/TiN delamination. Tungsten plugs, deposited from WF6 by CVD, are critical in multilayer interconnect schemes. A Ti/TiN underlayer is used in these applications to protect the underlying SiO2 and enhance W adhesion. Unfortunately, this "glue" layer tends to delaminate early in the W deposition step. The causes are unclear, but the problem can be controlled by additional TiN annealing steps and thicker TiN layers. At smaller device dimensions, however, thinner layers will be required and these solutions won`t work.

TEM studies reported by Ramanath revealed nanoscale pores in sputtered TiN layers. Pores surround the TiN grains and extend down to the underlying Ti. The pores thus allow fast, gas phase, transport of WF6.

Once WF6 reaches the Ti layer, Ramanath said, fluorine accumulates and attacks the metal. At lower concentrations, F dissolves in Ti, and the resulting Ti-F alloy weakens the bonds between the metal and the underlying oxide. As the F concentration increases, TiF3 forms, inducing interfacial stress by a 230% volume change. Finally, at extremely high F concentrations, TiF4 forms and etches the Ti directly. Ti-F alloy formation is more likely in TiN nanotubes, while TiF3 and TiF4 are more likely to occur where PVD shadowing has created gaps in the TiN coverage.

Though more work will be required, Ramanath suggested two solutions to the Ti/TiN delamination problem. First, improvement of the TiN layer quality, for instance through ammonia nitridation of Ti, would reduce the rate of WF6 transport. Second, with increased W nucleation rates, a protective layer would form more quickly.

Farhang Shadman of the University of Arizona outlined several water conservation strategies: dry processes; more efficient wet processes; reclaiming water for nonfab processes; and recycling water for fab processes. Shadman, director of the NSF/SRC Engineering Research Center for Environmentally Benign Semiconductor Manufacturing, advocated water recycling, saying the practice makes sense financially and environmentally.

He noted that water quality can improve along with quantity. "In most cases, the quality of waste water from rinse stations actually has better quality than clean water from any plant. Recycling makes sense on environmental grounds, cost effectiveness, on quality and stability of water," he said. However, the high sensitivity of recycling systems to perturbations is a big challenge to metrology. "We have been staying away from recycling because whenever we inject some kind of disturbance into a loop, we will have complicated responses."

A panel discussion on plasma processes and PFCs highlighted a subsequent session on hazardous gases. Alessandro Tonti from SGS-Thomson Microelectronics pointed out that the IC industry is the biggest intentional user of PFCs. Since it is a rich and prosperous branch of industry, "it is an easy target for political and community pressure." As a solution, Rafael Reif of MIT suggested manufacturers be self-regulatory, and that fabs must reduce emissions to a level where they have no impact on the environment. Short-term targets should aim at capping annual PFC emission, with simultaneous long-term goals of reducing emissions until there is no net increase in absolute atmosphere concentration. Other panelists encouraged research on alternative chemistries, such as plasma etching of SiO2 and SiN with non-PFC chemistries. Some of the compounds belonging to the hydrofluorocarbon and iodoflurocarbon families are reported to be viable alternatives for wafer patterning and PECVD chamber cleaning. - K.D., M.Y.M.L.