Underfill: what designers applaud and manufacturers tolerate
02/01/2000
Underfill: what designers applaud and manufacturers tolerate
DANIEL K. WARD
Flip chip underfill is the enabling process for flip chip interconnect survival on printed circuit boards (PCB). Its function: to distribute shear stress normally placed on the solder bumps. Stress is a product of the dissimilar coefficients of thermal expansion between the silicon integrated circuit and the laminate. Also, underfill enables the use of larger flip chip die on ceramic substrates, which historically feature smaller flip chips assembled with only compliant solder bumps to absorb coefficient of thermal expansion stress. With stress relief and reliability increasing the benefits of flip chip interconnect, it is easy to understand why product designers applaud underfilling: It permits expansion of flip chips in lower cost PCB assemblies and extends flip chip use in hybrid circuits.
Much information and data are available on the reliability-enhancing aspects of underfill materials. However, very little is published detailing their processing difficulties. Accordingly, this is a discussion on the challenges faced by the assembly process with the introduction and simplification of capillary underfill processing in the manufacturing system.
Basically a simple process, underfilling begins with dispensing a measured amount of material and permitting it to flow via capillary action under a flip chip spaced 0.002" above a PCB. The material then passes through a "picket fence" of solder bumps and fills the complete area under the device, it is hoped without significant voids or gaps. A second dispense cycle then creates a filet of underfill around the edges of the larger flip chips to discourage crack propagation in the underfill underneath. A prebake eliminates moisture from the PCB before dispensing; curing after the flow must also be included within the cycle of a typical surface mount technology assembly line.
Underfilling is a difficult process to mechanize and control because of its many processing steps featuring many variables. Further, real-time inspection technology is unavailable; very tight process control is the only way to ensure process quality. Prebake and cure times are relatively long, posing difficulties when configuring desirable inline flow assembly systems. For these reasons, manufacturers merely tolerate the process.
Are there materials and process innovations under development to reduce the actual complexities of the underfill process? Yes, as shown in the following descriptions, from the simplest to the most complex:
• A newly developed microwave oven underfill cure system can now reduce cure times of current formulations by more than 50 percent. However, as a batch process in high-volume assembly, it significantly reduces neither investment nor floor space. Its advantage: reducing residual stress of the curing process and, thus, increasing flip chip reliability.
• Numerous underfill material reformulations to speed capillary action through tighter spaces are being tested. New materials with faster conventional cure times (15 to 20 minutes) and even snap-cure materials (five minutes) are also being tested.
• A completely new underfill process, given the very descriptive name of "no flow underfill," is in the late stages of development; it has fewer steps than the traditional procedure. Its process flow consists of a PCB prebake, an underfill single point dispensing on the flip chip site (the formulation now includes a fluxing component), and placement of the device with pressure sufficient to pierce the solder bumps through the material and contact the pads. The assembly then passes through the reflow process where the bumps are reflowed and the underfill cured. A post-cure process might also be necessary. The advantages of no flow are simplified dispensing, eliminated flux, and combined reflow and cure. However, much work remains to quantify reliability and determine process robustness.
• The most desirable development seeks to eliminate the wet underfill process from the manufacturing floor and move it to the wafer fabrication area. Underfill and flux are applied and "B-stage" cured on an entire wafer as part of the bumping process. The wafers are then sawed into individual flip chip/underfilled/fluxed assemblies and named "flip scale packages." These packages are presented to the assembly line like typical flip chip components - the placement operation locates the packages to their mounting pads and, with temperature and time, flux tackiness secures them to the board. Assemblies are then processed like no flow underfill.
Some final words to manufacturing: "Keep that underfill process under control a bit longer; improvements are on the way!"
DANIEL K. WARD is manager of Advanced Electronics Packaging for Delphi Delco Electronics Systems, One Corporate Center, P.O. Box 9005, M/S: D-16, Kokomo, IN 46904-9005; 765-451-3093; Fax: 765- 451-3115; E-mail: [email protected].