A Novel MCM Technology
10/01/2002
BY ERIC BEYNE AND ELS PARTON
The increasing complexity and integration of electronic systems require advanced packaging and multichip module (MCM) techniques. IMEC's approach, referred to as MCM-SL/D, combines thin film, high-density interconnection capabilities with that of advanced build-up laminate board technologies. MCM-SL/D consists of thin film, high-density interconnection deposited (D) on top of a sequentially laminated (SL) printed circuit board (PCB). The technique enables a very dense interconnection pattern and requires no additional packaging of the laminate substrate.
 Figure 1. Schematic cross-section view of an MCM-D for the interconnection of digital circuits. |
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MCM Technologies
Demands for higher reliability, better performance and lower system costs are driving the development of complex, high-density packaging technologies. MCM technology mounts multiple, unpackaged integrated circuits (IC) along with signal conditioning or support circuitry, such as capacitors and resistors, on a single laminate or ceramic base material to provide a dense conductor matrix for interconnecting the components. MCMs allow high-speed devices to be placed closer to each other, with the benefits including lower loads on the IC output buffers and better signal transmission properties. An MCM is typically 30 to 60 percent active silicon area, compared to about 15 percent for surface mounted circuits on a PCB. MCMs also offer the capability to mix digital and analog functions, and an ASIC can be combined with standard processors and memory in one package. The overall capacitive and inductive loads in the system are lower and easier to control compared to a standard PCB. MCMs are, in general, less susceptible to electromagnetic interference (EMI) than PCBs.
According to the Institute for Interconnecting and Packaging Electronic Circuits (IPC) the three primary module categories are laminate MCMs (MCM-L), ceramic MCMs (MCM-C) and deposited MCMs (MCM-D). MCM-Ls are advanced printed wiring boards, using polymer/glass fiber-based dielectrics and copper. MCM-Cs are constructed on co-fired ceramic or glass-ceramic substrates using screen printing technology forming the conductor patterns. MCM-Ds consist of thin film conductors and dielectrics deposited on any of a variety of substrate materials (Figure 1). MCM-D generally provides the highest interconnection density and transmitted signal frequencies.
 Figure 2. MCM-D RF circuits on a glass substrate. |
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MCM-D Features
MCM-Ds are formed by the deposition of thin film metals and dielectrics, either polymers or inorganic dielectrics, on dimensionally stable bases, such as silicon, glass, alumina and aluminium nitride. The multilayer thin film technology offers a dense interconnection pattern with lines and spaces to the 10 to 20 μm range. The shorter interconnect lengths, compared to interconnects of individually packaged ICs, result in improved high-speed performance. Passive components may either be integrated into the substrate or assembled in discrete form on the substrate, depending on the number and value of components, the substrate area, stability and tolerance expected.
Thin film technology also enables accuracy and process tolerances to be controlled to realize high-quality radio frequency (RF) and microwave circuits in the interconnection substrate (Figure 2). In one version of MCM-D, alternating thin layers of benzocyclobutene (BCB) dielectric and copper metallization create a flexible multilayer configuration to realize a wide variety of RF passive structures (Figure 3).
In MCM-Ds, photolithography applies and patterns the dielectric and metallization layers. Metallization layers consist of power planes, signal layers and die bonding pads created by conventional sputtering, vacuum evaporation methods or electroplating, followed by standard photolithography. Conductors can be aluminum, gold, silver or copper. If silicon is used, additional circuitry, such as memory and module I/O protection, can be incorporated in the bulk substrate. This implies a better use of the active silicon area because the I/Os on the chip can be simplified considerably, which requires less space.
Thin film structures generally are produced on substrates that only function as a carrier. After assembly, the substrate has to be packaged, which means an additional system cost. However, the use of laminate or ceramic high-density interconnect substrates can be considered as ball grid array (BGA) "interposer" substrates, requiring only over-molding and solder ball attachment, rather than a full packaging process sequence.
 Figure 3. Typical cross-section of the RF and microwave MCM-D build-up structure. |
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MCM-SL/D Technology
As part of the FLIPAC project (Esprit Nr 2680), MCM-SL/D technology was created by IMEC with the support of the European Commission. Thin film density interconnection capabilities have been combined with advanced build-up laminate board technologies using copper for the interconnection lines and photosensitive BCB for the dielectric layers. BCB has the required low curing temperature of 200° to 250°C, while electroless Ni:P/Au is used for the final contact metallization layer. This results in a thin film on a laminate substrate enabling a high-interconnection density, with a Z-axis electrical connection, no holes in the substrate and a flat top surface for further thin film processing.
 Figure 4. Details of MCM-SL/D assembly test structures. |
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Laminate Substrates
The MCM-SL/D packaging technology places stringent requirements on the chosen substrate, requiring high accuracy and compatibility with the thin film process flow. It also must be possible to handle the PCB as a wafer, and the substrate must be sufficiently flat and rigid for automatic handling. For standard wafer handling equipment, a disk measuring 150 to 200 mm is required. After manufacturing, the laminate substrate must be accurate enough for precise connection between the thin film and the laminate layers. This requires reproducible shrinkage or stretch factors during the PCB processing.
Furthermore, the metal and dielectric thicknesses are an order of magnitude larger in PCB than in thin film technology. The laminate needs to be sufficiently planar on a local scale for reliable coating with the thin film layers. The substrate also must be stable during processing of the thin film structure. Shrinkage or stretching can result in misalignment. Its thermal stability should allow for several polymer curing cycles and metallization steps. Figure 4 shows test structures that were used to evaluate the suitability of different materials.
The substrate must be sufficiently flat and rigid for the thin film processing equipment to handle the PCBs as wafers. Materials traditionally used for PCBs, such as FR4, will not remain stable during the MCM-D process flow. However, flexible materials provide handling problems, while the rigid materials provide difficulties in obtaining sufficiently flat starting materials.
The MCM-SL/D solution uses a four-layer core substrate, consisting of a basic core, a double-sided PCB with traditionally drilled 200 to 300 μm diameter holes and large via areas, with a minimum diameter of 500 μm (Figure 5). For the basic core, FR4 was found to have too low a Tg and would not remain stable during the MCM-D process flow. Polyimide/ glass core material was found to provide high thermal stability but absorbed a significant amount of moisture. This absorption results in significant wafer bowing, which is reversible with dehydration before each lithography or vacuum step. It also requires the use of meshed ground planes to avoid blistering after heating cycles. Alternatives to polyimide/glass substrates also were investigated and found to be more suitable.
The through holes can be placed on an 800 μm grid spacing for a high back-to-front interconnect capability, as well as for a direct connection to a standard BGA grid. The holes in the substrate are later filled by laminating resin coated copper (RCC) foils on each side to make up the sequential lamination, resulting in a very planar, hole-free, outer layer. Vias measuring up to 100 μm in diameter can be laser-drilled in these RCC layers. The SL core needs to be fairly basic, with functions limited to power and ground distribution, for example, so it does not produce yield or tolerance problems. Components are attached by flip chip, wire bonding or as chip scale packages to the front, with solder balls or fine-pitch connectors on the back.
An additional RCC layer is laminated on the front and back of the core. The external copper is stripped away, leaving only resin between metal traces and in via holes. To ensure the quality of the process and for easy endpoint detection, an almost fully metallized (meshed) core layer is used. This layer is intended as a ground plane and has not been found to be a significant limitation on the package design. Although an extra thin film mask is used, it enables a more accurately defined thin film layer with a local substrate planarity of ±5 μm. Electrical connections through the substrate may be realized and the substrate can be used as part of the MCM package, which then can be used as a BGA-style component.
It was found that sputtering of thick copper layers significantly increases irreversible substrate bowing because of high-internal stress and high process temperatures. It is preferable to produce the metallization layers by a sputter/plating process, where a thin seed layer is deposited before the actual, thick metal layer is applied by electroplating, using a photoresist mask layer.
Component assembly on the MCM-SL/D substrates was investigated. Both wire bond and solder attachment is possible. Excellent wire bondability was observed on the smooth electroless Ni:P/Au surface finish. For the flip chip assembly, a solder mask defined pad lowered the stress on the BCB dielectric layers.
 Figure 5. Thin film layers on the planarized core layer of MCM-SL/D technology. |
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Testing the Structure
The front-to-back feedthroughs were measured and resulted in an insertion loss <0.5 dB measured up to 5 GHz.
The core must be dimensionally stable to ensure connection between the thin film line patterns and the core. After manufacture, it was found that the pattern can deviate. However, correcting the masks alleviates this. Even after correction, there will be a geometry tolerance. IMEC obtained a typical standard deviation of 9 and 15 μm for X and Y orientations, respectively. Using a pad diameter of 200 μm on the core substrate, a 40 μm diameter via on the first BCB layer and a 50 μm diameter via contact pad on the first metal pad, a process latitude of 5 σ results, without sacrificing the high-density wiring capabilities on the interconnection layers.
Where a thicker layer of BCB (10 μm instead of two layers of 5 μm) was used on the laminate structures, via resolution and spread in contact resistance values were less than 2 mΩ for 40 μm vias. For the thin film via contacts to the laminate substrate, a significantly larger spread is found, as a result of the laminate copper roughness, substrate bowing and the thicker BCB layer. For diameters larger than 60 μm, an excellent via was obtained.
With limited internal test points, testability considerations have to be taken into account at an early design stage. In the electrical design, the module's netlist is created from an informal specification of the module. Following digital/timing/ analog simulations, the netlist is transformed into a layout.
After manufacturing of the substrate and assembly of the components on the substrate, the system can be electrically tested. By using an internal test, the functional test can be simplified. It was found that components that do not function properly can be replaced before final packaging or sealing for a greater level of reliability.
Eric Beyne, head of the high density interconnection and packaging group, and Els Parton, scientific editor, can be contacted at IMEC, Kapeldreef 75, B-3001 Leuven, Belgium; 32-16-281-261; Fax: 32-16-281-501; E-mail: [email protected].
Illustration by Gregor Bernard