Assembly Processes for Flip Chips on Substrates
11/01/2003
Study provides new data on assembly of solder flip chip devices.
BY DAVID A. GEIGER, JONAS SJOBERG, PATRICK WONG AND DONGKAI SHANGGUAN
Flip chip assembly is a key capability to enable product miniaturization. Our previous studies have investigated several flip chip interconnection types, including anisotropic conductive film or paste, and Au-Au thermosonic bonding. This project focuses on the assembly of 0.200- and 0.250-mm-pitch solder flip chip devices. Two methods of applying flux for the flip chip are investigated: the dip fluxing method, and jet fluxing of the substrate. The placement accuracy of a traditional SMT pick-and-place system (upgraded for flip chip) is investigated and the results are discussed. The impact of the reflow process in air vs. nitrogen is also examined. Two underfill materials are evaluated for compatibility with the flux. Results of reliability testing (including thermal cycling, mechanical shock and vibration) are presented.
Component Selection
The components selected for this study are shown in Table 1. Flip chip components are all daisy-chained die to allow continuity checks throughout the process. The die passivation is nitride on all the flip chip devices. For the PB-8 flip chip, the UBM is 102 µm in diameter, and the bump is 120 µm in diameter and 95 µm in height. The FA-10 and the PST01 flip chips have a UBM diameter of 102 µm, bump diameter of 135 µm, with a height of 120 µm. All the solder bumps in this study are Sn/Pb eutectic alloy. The other components are surface mount type parts that may be found on a similar device that this test vehicle emulates.
Test Vehicle Design
The test vehicle is a module format that is 28.575 ¥ 22.225 mm in size. It is then panelized in a 127 ¥ 177.8 mm panel with 20 modules per panel. The board is 6 layers with a total thickness of 0.5 mm. The board material is FR-4 (Tg = 140°C; CTE x, y =12-16 ppm/°C). The surface finish is an electroless nickel and immersion gold (ENIG), with 3.81-5.08 µm for the Ni thickness and 0.0762-0.203 µm for the Au thickness over the nickel. The components are on a single side, allowing one SMT process step; however, the module was designed so that it can accommodate solder spheres on the secondary side.
 Figure 1. Area array land pattern |
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The land patterns for all the surface mount components are standard land patterns, including the 0201 component.
 Figure 2. Perimeter array land pattern (trench style) |
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For the flip chip, two types of land patterns were used, one for the perimeter array type and the other for the full area array. For the area array packages (0.250-mm pitch), the land pattern was designed as shown in Figure 1. This land pattern will only work for this daisy chain sample; if a real part is to be used, then the copper would need to be changed to an individual pad and would need to contain a micro-via in order to route. For the perimeter array package, a trench-type design was used (Figure 2). This land pattern was used for the PB-8 (0.200-mm pitch) and the PST-01 (0.250-mm pitch) devices.
Experimental Work
Incoming Inspection. The die and the boards were inspected prior to running any boards for the study. For the die, some defects were found, including missing solder spheres, damaged solder spheres and contamination (Figure 3). The defective samples were removed from the build.
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Solder Paste & Fluxing Materials. The solder paste used for surface mount parts is a typical eutectic Sn/Pb solder paste. For the flip chip parts, two types of fluxes and flux application systems were used. The first one is a traditional tacky gel flux applied by dipping the flip chip device into a controlled thickness of flux on the pick-and-place equipment. This flux was previously studied and known to be compatible with the underfill material. The flux thickness used for this study is 38-50 µm (about 1/4-1/2 the bump height on the die). The flux measurement was done using a wet-film gauge. The drum was inspected to ensure that the flux film was uniform and did not contain any streaks or striations that may cause some of the flip chip solder bumps not to be fluxed.
The other flux is a liquid-type flux, which is applied prior to pick-and-place using a flux-jetting machine. The flux dispenser was optimized prior to running. The type of nozzle used to dispense the flux had a large impact on the spray pattern. Using a 30-gauge needle caused the flux pattern to be non-uniform and caused stray dots to be deposited over the board. A piece of thermal fax paper was placed over the board to check the spray pattern. Also, a glass plate was used to check the uniformity of the spray. It was found that the 28-gauge needle provided a more uniform flux deposit.
Pick-and-Place. Work was done to check the capability of the pick-and-place machine to be able to place the flip chip parts accurately. The current equipment was upgraded, and a vision camera capable of recognizing the flip chip bumps was installed on both the IC head and the revolver head of the equipment. The machine specification for the IC head with the upgrade is 40 µm at 4s and for the revolver head it is 60 µm at 4s. The pick-and-place machine was then checked for the actual placement accuracy using a modified version of the IPC-9850 procedure. In this trial, the flip chip devices were placed onto the glass plate and then the (x, y) locations of the four corners of the flip chip parts were found using a measurement system. From this data, the center of each device was calculated and the difference from the programmed center was determined. Using a specification of ±50 µm, the Cp and Cpk were calculated for the various scenarios. These scenarios were: 1.) Sequence of placement (pick – vision align – dip flux – place, or pick – dip flux – vision align – place); 2). Using only three bumps in each corner vs. six bumps in the corner for alignment (Figure 3); 3.) Using the IC head vs. the revolver head.
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 Figure 3. Incoming die defects |
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Looking at the first scenario (the pick-and-place sequence), the equipment has the option to be able to pick the flip chip part up and then either vision align the part, then dip into the flux film and place, or dip the part, then vision align and place. After both methods were run and the Cpk data was collected, and it was found that both methods were about equal.
Scenario 2 looks at the number of bumps in the corner to use for vision alignment. To increase the vision processing speed for volume placement, only some of the bumps are used to align the part. Using six corner bumps increased the Cpk value from 1.37 to 2.36, as compared to using three corner bumps.
 Figure 4. Before reflow (top) and after reflow (bottom) of a misaligned device |
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The last scenario compares the IC head Cpk values to that of the revolver head. The IC head will only pick-and-place one part at a time, while the revolver head on this equipment can place up to six parts at a time. The IC head has a higher Cpk value than the revolver head, much as expected. Based on these results, the rest of the experiment was run with the IC head using six corner bumps to align the flip chip devices and fluxing the parts after the vision processing.
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 Figure 5. C-SCAM images |
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Process. A typical reflow profile was used, with nitrogen atmosphere (<1,000 ppm O2). For each panel run, the boards were inspected with X-ray prior to reflow, after reflow and after underfill. Continuity tests were done after reflow, after underfill and during the reliability testing.
Results and Discussion
A total of 140 modules were assembled. The breakdown of the assembly is shown in Table 2. After pick-and-place, all the flip chip devices were inspected under X-ray for alignment to the pads. Out of 420 flip chips placed, only two placements were greater than 25 percent off the pad. One device was seen to have approximately 50 percent misalignment after pick-and-place; after reflow, it was observed that this part self-aligned to the pad and formed a good solder joint (Figure 4).
After reflow, the units were X-rayed and continuity checks of the daisy chain were performed. The air reflow produces the lowest yield on all the flip chip devices. The air environment does not allow complete collapse of the solder ball to occur, preventing some of the solder joints from forming. The jet fluxing process shows a high number of failures as well, with three failures seen on the FA10 device. For the flux dipping process with reflow in nitrogen, only the FA10 devices show some failures. The FA10 devices consistently have more failures than the other two devices. This can be explained by the pad design. The FA10 has the soldermask that was opened almost 1:1 to the size of the pad. The other devices had the trench-style pad design. The FA10 pad design does not allow the solder bump on the flip chip to wet down the sides of the pad. It acts like a soldermask-defined pad instead of a nonsoldermask-defined pad. Since the solder ball cannot collapse enough, there is a risk that not all the solder joints will form, causing an "open."
 Figure 6. X-ray of solder bridging |
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Once the boards were inspected and tested after reflow, they were baked prior to being underfilled. This is to make sure that there was no moisture in the substrates that can cause voids during the underfill process. Two types of underfill were used; Underfill A was applied on the modules with dip fluxing, and Underfill B was dispensed on the boards through jet fluxing. After the underfill was applied, the modules were cured using the recommended cure schedule for each underfill material. Scanning acoustic microscopy (SAM) was performed on the units and a typical image can be seen in Figure 5.
After the assembly was completed, the modules were sent for reliability testing, which included thermal cycling, mechanical shock and vibration testing. Twenty modules each from Process 2 and 3 were sent for thermal cycling. The conditions for the thermal cycling were –55°C to 125°C, for up to 1,500 cycles. Board #8 was run with flux dipping and underfill A, while board #5 was run with jet fluxing and underfill B. It can be seen that the CSP48 device, which is not underfilled, fails before the flip chip devices. Also, for the flip chips on board #8, the failure was a bridge that occurred between the solder joints on the trench-style designed pads (see X-ray in Figure 6). The cause of this bridging is most likely a void in the underfill due to the trench design in which the underfill did not flow into the trench area. Then the solder was extruded during the temperature cycling and proceeded to the other solder joint through cracks in the underfill. The first failure for any of the flip chip devices was seen at 1,000 cycles, due to this bridging phenomenon.
Conclusion
In summary, solder flip chip assembly on FR-4 was demonstrated to be feasible. The processes, such as pick-and-place, reflow and underfilling, were evaluated to determine which combinations would provide the better yield and reliability. The study shows that the dip fluxing method with nitrogen reflow was the best combination to use. Further optimization is needed for the jet fluxing process.
Editor's note: This paper was originally presented at APEX 2003.
DAVID A. GEIGER, senior process engineer, JONAS SJOBERG, senior specialist, PATRICK WONG, manager, advanced engineering, and DONGKAI SHANGGUAN, director, advanced process technology, may be contacted at Flextronics, 2090 Fortune Dr., San Jose, CA 95131; e-mail: [email protected], [email protected], [email protected] and [email protected].