Getting your SiP to Market
09/01/2003
A discussion on the necessary steps to producing a cost-effective SiP product
By Paul Smith
There are almost as many definitions of system-in-package (SiP) as there are companies manufacturing them. For the sake of clarity, this article defines SiP as a single package having one or more ICs plus passives with multiple interconnections. It incorporates any combination of wire bond, flip chip and stacked-die technology. The substrate interconnect frequently is complex and requires advanced design and simulation tools. Essentially, an SiP combines different die technologies and applications with active and passive components to form a complete system or subsystem in a single standard footprint package.
This article discusses the process an assembly and test contract manufacturing services supplier (A&T supplier) follows in conjunction with a customer in regard to determining which substrate materials, components, computer-aided design (CAD) software, simulation tools and test solutions will be used to develop the fastest time-to-market solution at an effective cost. Also discussed is the approximate time it will take to go through the various development phases. Figure 1 shows the key development events.
The increasing demand for SiP is driven by the need for a faster time-to-market and a lower development cost alternative to the single-die system-on-chip (SoC) approach. SoC costs are rising from $2 million for designs at 0.35 µm to more than $13 million at 0.09 µm. Additionally, design time is taking between 18 to 24 months, and as the customer base shifts to more consumer-based applications, this lag time is unacceptable. Because many consumer products become obsolete in one to two years, the odds of designing an SoC product that will satisfy a specific application requirement two years into the future is low, resulting in a high investment risk.
Many companies find that they can bring some of their products to the market at a lower development cost with significantly shorter lead times. By using multiple but less complex ICs in combination with active and passive components on a single substrate, many of the new SiP products take only six to 12 months to deliver. Additionally, the cost to "redo" an SiP design is less costly and much faster than the SoC approach. This allows companies to modify an existing design to meet the rapidly changing application requirements. While SiP technology will not replace SoC, it is gaining acceptance as a viable alternative for many applications.
This acceptance is demonstrated in a recent Semico Research study, which forecasted the SiP growth in the A&T supplier market to raise from 148 million units in 2002, to 1,540 million units in 2007, for a 60 percent CAGR. The report stated that applications such as cell phones, Bluetooth, WiFi, CMOS sensors, computer graphics and network packet switching will drive initial demand. These figures exclude packages using only stacked-die technology, which typically are used for memory products (Figure 2).
Getting Started
As the SiP concept gains acceptance, many customers find that they lack a clear understanding of the steps necessary to develop an SiP product. When selecting the SiP for a new product application, one must take into account not only the technical issues related to the various substrate options and device-interconnect performance issues but also the ability of the A&T supplier to produce SiP devices in high volumes at an effective price, while meeting reliability requirements. To reach an optimum solution, it is key that SiP development follows the three basic phases outlined in Figure 1.
 Figure 1. The key development events |
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Key Development Events
Phase 1. A critical point in SiP product development is getting the A&T supplier involved in the early stages, including the initial product concept stage. In the long term, it will save time, cost and effort. It is important that the A&T supplier provides design guidelines and a detailed checklist to guide the development process. Additionally, the A&T supplier must have a clear understanding of the various components and substrate supplier's material and process capabilities, including electrical, thermal and mechanical characteristics for the various options.
 Figure 2. A stacked die package typically used for memory devices |
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The following is a list of the initial information that a customer should provide to help reduce overall development time:
- A description of the function of the various ICs to be used in the SiP, i.e., analog, digital, mixed-signal, memory or general IC performance/characteristics.
- The various die geometries, including X, Y and Z dimensions, bonding pad names, and their respective location/coordinates. For flip chip, the bump material, size and pitch will be needed.
- A rough draft bonding diagram (Figure 3) components list and net-list — or, at a minimum, a schematic.
- The target package type and size, i.e., 5 x 5 mm, 0.8 mm pitch, land grid array, with a thickness of 1.0 mm.
- The desired electrical and thermal performance, including critical path parameters, i.e., device frequency range, off-chip clock frequency, the various ICs' respective power dissipation, required matched impedance traces, RF shielding, etc.
- A description of the end application.
- The target tester type that will final test the product and the expected test time.
- Reliability requirements, i.e., moisture-sensitivity level, operating environment, etc.
- Any other unique requirements such as lead-free and/or "green."
If the customer can provide the above information and the application is fairly simple, it typically will take only one to two days for the A&T supplier to perform the feasibility study and provide a budgetary price quote that includes the recommended substrate base material, rough layout and components. For more complex applications, it may take several more days because the selection of the most price-effective substrate base vs. the required SiP module performance is complex. The A&T supplier must select the optimum solution among a wide range of materials that include bismaleimide triazine (BT), high-frequency materials, low-temperature co-fired ceramic (LTCC), number of layers, plating methods, via types and more (Figure 4).
 Figure 3. A rough draft bonding diagram/layout |
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In many cases, the customer will not be able to provide all the information and will need to work hand-in-hand with the A&T supplier to get through this critical selection phase. Clear and quick communications by both parties is paramount to keep total development time to a minimum.
Substrate design and component selection is driven by the overall SiP performance requirements and it is important to note that the substrate is the primary price driver for the SiP package. Approximately 80 percent of the substrate and bill of materials cost is determined during the first 20 percent of the development time. The second major — and often overlooked — price driver is selection of the tester type that will test program/hardware development and the final product.
Depending on how fast the above details fall into place, it typically takes two days to two weeks to get through Phase 1, which is from the initial customer requirements to a preliminary agreement. Both the customer and the A&T supplier must not rush through this critical part of the development. Getting it right at this phase will save time, money and frustration in the long term.
Phase 2. Once a preliminary agreement has been reached, the A&T supplier will start the detailed substrate design layout and run the electrical, thermal and mechanical simulation iterations to develop the SiP in compliance with performance specifications. Design, modeling and simulation tools are available for the development of SiP products. Over the past few years, while there have been improvements in these tools, costs remain high. Therefore, the A&T supplier and the customer must be aware of the limitations and keep driving the modeling/simulation tool suppliers for continued improvements.
After the initial design/simulation is complete, crucial dialog between the customer and A&T supplier determines an optimum design vs. any potential price tradeoff. Once the customer approves the final design, the A&T supplier provides the final price to produce the product, although, at this point, the price for test remains budgetary. The time it takes to get through Phase 2 will vary and depends on design complexity, timely responses between the customer and A&T supplier, and how fast the customer makes decisions. It typically takes from two days for simple designs to six months for complex devices; however, between one to four weeks is the most typical.
 Figure 4. Cost and performance vs. the various substrate material and feature options |
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Phase 3. Once the customer agrees with the design and price, three parallel activities take place:
- The development of the test program and hardware will begin by a) the customer, b) the A&T supplier or c) a third-party test development company. This takes between four to 12 weeks and depends on the SiP module complexity and its design-for-test capability.
- The A&T supplier orders the substrates and components to build prototypes and/or qualification parts. This takes between one to three weeks and depends on the substrate supplier's lead-time.
- The assembly of prototype or qualification lots takes one to two weeks.
- Approximately 50 percent of customers build between 50 to 300 "dummy" SiPs that contain all the components, except they use daisy-chain die rather than the actual ICs. Daisy-chain die have bonding pads without active circuits. The dummy parts typically perform evaluations and ensure that the SiP structure is reliable before committing the actual active ICs.
- The other 50 percent of customers build between 50 to a few thousand actual SiP parts to a) evaluate the product in conjunction with the end customer, b) provide the test development staff with functionally working parts and c) qualify the A&T supplier for full production and final approval.
It is during this phase that the test development effort is completed and the price for SiP testing is finalized. Getting the customer's final approval varies depending on the nature of their business and their relationship with their end customers.
Conclusion
Most customers initially are apprehensive about the prospect of developing an SiP product. Generally, it is based on a lack of understanding about the sequence of events that must take place and how the decisions are made with regard to the selection of materials vs. performance requirements. Developing the SiP product takes anywhere from several weeks to one year, depending on design complexity and the lead-time to develop ICs for the SiP. Following a detailed path in the right sequence and working hand-in-hand with the A&T supplier will result in a relatively pain-free process that will provide a more cost-effective solution than SoC in less than half the time.
References
For a complete list of references, contact the authors.
PAUL SMITH, director of marketing, may be contacted at Carsem Inc., 269 Mt. Hermon Rd., Suite 104, Scotts Valley, CA 95066; e-mail: [email protected].