Issue



Flip Chip Bonding: Flexible Circuit Devices


10/01/2004







Designed for Biomedical Applications

BY DANIEL N. PASCUAL AND STEVE CALLENDER

The ability to control a machine by only using one's thoughts is a long-standing dream, especially for those who are paralyzed. In recent years, technological advances have accelerated progress toward a useful human brain machine interface (BMI).1 Biomedical researchers at Duke University working with neural probes have successfully developed ASICs for signal conditioning and electrical circuitry for wireless transmission of power and information — all intended for biomedical implantation.2,3 The next step in this succession of development is device packaging. How will the interconnection of these components be accomplished?

For biomedical implants, size and reliability are always crucial factors. Fortunately, two technologies from the microelectronics packaging industry lend themselves naturally to this application and are presented in this article: flip chip bonding and flexible substrates.

Flip chip bonding has existed for more than 30 years and is known for its advantages in compactness, high interconnect density, and improved electrical performance because of minimal lead length.4 A low-cost method used here for preparing the dice for electrical connections was gold stud bumping, rather than solder connections used by others with similar applications.5,6 Another advantage of flip chip bonding is the ability to create multichip modules composed of several varying dice mounted onto one carrier. This eliminates the need for connectors, which typically are bulky and less reliable. Furthermore, flexible substrates made of polyimide can be bent and folded to make compact devices.7 Since the polyimide material is only compatible with low-temperature bonding techniques (<200°C), thermally cured adhesives, rather than solders, typically are used to provide mechanical and/or electrical connections.

To develop an interconnection platform suitable for our biomedical application, polyimide test dice were designed, fabricated, bonded and tested. Both conductive and nonconductive adhesives were used. Reliability data was obtained by measuring contact resistance while subjecting the bond to thermal cycling.

Bonding Techniques

Our intent was to develop a reliable interconnect method for singulated dice onto flexible substrates using gold stud bumping and adhesives. Two bonding methods are presented here. The first method uses a nonconductive thermosetting adhesive. The second uses a conductive adhesive and a nonconductive underfill.


Figure 1. Multiple test devices were incorporated into a single polyimide sheet.
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The test vehicles shown in Figure 1 were developed as part of a flex substrate design to evaluate the two bonding techniques. Each test vehicle consists of a "breakout" and a "dummychip." The dummychip in Figure 2 shows an alternate-pin daisy chain, which makes it relatively easy to detect open bonds and shorted connections. A pin grid array (PGA) substrate also was produced in the same polyimide sheet for future testing of amplifier ICs.


Figure 2. Dummychip detail showing alternating daisychain and stud bumps.
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Dummychip Preparation. To make the flex dummychips rigid like silicon die, they required a stiffener on the backside. The stiffener provided by the substrate manufacturer proved to be too soft, so a small piece of 1-mm-thick microscope slide was super-glued to the back instead.


Table 1. Machine parameters for gold stud bumping.
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Stud Bumping. The dummychips and dice used in these methods were given gold stud bumps with a digital auto-step-back wirebonder*. The machine settings are shown in Table 1.


Table 2. Machine settings for nonconductive adhesive bonding.
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Nonconductive Adhesive Bonding. In the nonconductive adhesive method, the bumped die and the substrate are bonded with a thermosetting nonconductive adhesive. The alignment and bonding are performed on a flip chip bonder.** Machine settings and a bonding profile are shown in Figures 2 and 3, respectively.


Figure 3. Coining and bonding profile for nonconductive adhesive. The upper trace shows force for coining at 660 g, and then bonding at 3,300 g. The lower trace shows temperature ramp from 80º to 150ºC, back toward ambient.
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The following bonding steps were used:

  1. Bumped die and substrate were loaded into the flip chip machine.
  2. Die and substrate were aligned by the flip chip machine.
  3. Nonconductive adhesive was dispensed on the substrate.
  4. Bumped die was coined and bonded in a single bonding profile. Coining compensates for irregularities at the bonding interface. A small amount of scrubbing was used during initial contact.
  5. Adhesive was heat-cured during bonding under pressure, and then cooled before releasing the pressure.

Conductive Adhesive Dip Bonding

In the conductive adhesive dip bonding method, the bumped die is dipped into a thin layer of silver-filled conductive adhesive. The dipped, bumped die and the substrate are then bonded with a thermosetting nonconductive adhesive. Alignment and bonding also are performed on the same flip chip bonder. Machine settings and bonding profiles are shown in Table 3 and Figure 4, respectively.


Table 3. Machine settings for conductive adhesive bonding.
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Figure 4. Bonding profile for conductive adhesive process. The upper trace shows bonding at 3,300 g. The lower trace shows temperature ramp from 40º to 150ºC, back toward ambient.
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Bonding Steps.

  1. Bumped die was loaded into the flip chip machine.
  2. Glass slide was placed on substrate chuck.
  3. Thinned, conductive adhesive was dispensed onto glass slide. Note: conductive adhesive was thinned 10% by weight to achieve better dipping performance.
  4. Flip chip machine was used to spread conductive adhesive to a depth of 30 µm.
  5. Bumped die was coined into the 30-µm adhesive.
  6. Glass slide was removed and replaced with substrate.
  7. Nonconductive adhesive was dispensed onto the substrate.
  8. Die was aligned and bonded to substrate through adhesive.
  9. Adhesive was thermally cured under bonding pressure, and then cooled before releasing force.

Thermal Testing. Thermal cycling commonly is used for bond reliability testing. During thermal cycling, the temperature and the resistance of a single pair of bonds on the dummychip were recorded at 30-sec. intervals.

The thermal testing profile consisted of:

  1. 85°C for 10 min.
  2. Ramp to -10°C as fast as possible.
  3. Hold at -10°C for 10 min.
  4. Ramp to -85°C as fast as possible.
  5. Repeat cycle.

Results

Individual dummychips were cut from the polyimide sheet, stiffened using a small piece of glass, gold stud bumped and then bonded to the breakout test vehicles using the methods described earlier for either nonconductive or conductive adhesives. Figure 5 shows a bonded dummychip with glass stiffener. The polyimide dice were translucent, which allowed visual inspection of the bond interface. The gold stud bumps appeared to be evenly compressed, indicating good parallelism between the mated pieces. Post-bond alignment accuracy was within 3 µm. Some air bubbles were observed, trapped within the adhesive layer, but did not seem to effect performance.


Figure 5. Transparent dummychip with glass stiffener bonded to flex substrate using nonconductive adhesive.
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Two sample dummychip/breakout hybrids bonded using nonconductive and conductive adhesive methods were subjected to thermal cycling. The total bond-pair resistance for each case is shown in Figure 6.


Figure 6. Effects of thermal cycling on bond resistance.
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Both samples remained electrically connected after 40 hrs. of thermal cycling (no electrical discontinuities were observed). Neither method showed much electrical shift in baseline resistance (<2 mΩ). The average resistance for the nonconductive adhesive method was about 17 mΩ, with a range of 5 mΩ. The conductive adhesive method averaged about 44 mΩ, with a larger range 13 mΩ.

Initial tests indicated that the nonconductive adhesive method was more favorable. This method was used to bond functional amplifier ASIC dice to flexible PGA substrates that were cut out of the polyimide sheet. One of these hybrids is shown in Figure 7.


Figure 7. Neural amplifier ASIC bonded to flexible PGA substrate.
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The bonded neural amplifiers were tested for electrical functionality and compared to dice commercially packaged into ceramic PGAs. The first amplifier bonded to the flexible substrate performed identically to a commercially packaged device containing the same neural amplifier.

Discussion

The use of gold stud bumping and adhesive bonding had several advantages. First, the process was suitable for the singulated ASIC dice.

In practice, using flex dummychips as part of a test vehicle was an inexpensive and practical way to develop bonding methods. An unexpected benefit of using polyimide as the substrate material is that the dummychips and the test vehicle were semi-transparent. This made it possible to inspect the test bonds with a light microscope.

Bonding with nonconductive adhesive had relatively few process steps, and no cleaning steps or additional underfill were required.

Bonding with the conductive-adhesive-dip process involved several more delicate steps. In particular, the spreading and dipping sequence must be executed very carefully. Also, an additional underfill step was required for mechanical strength. A disadvantage of both methods was the long (10-min.) adhesive cure time, which was acceptable for these research experiments. An adhesive with a shorter cure time, however, would be better suited to volume production.

The adhesives and underfills are believed to help force the die and substrate closer together as they cure — providing additional contact reinforcement.

During thermal cycling, the average bond resistance for nonconductive adhesive was within the expected range and was comparable to those reported by others.

Flip-chip-on-flex substrates using nonconductive adhesive performed electrically as well as a commercially prepared ceramic PGA. Furthermore, flip-chip-on-flex substrates have the advantage of being more compact and adaptable to different shapes.

Conclusion

Two interconnection methods were developed and evaluated for flip chip attachment of neural amplifier ASICS to flexible substrates. Process development was performed using dummychips and breakout circuits made from polyimide. Gold stud bumping in conjunction with a nonconductive adhesive was determined to be the preferable method for bonding, because of its simplicity and reliability. This method also was used to bond neural amplifier ASICs to PGA substrates. The first attempt yielded a 100% functional hybrid.

Acknowledgement

This work was supported by U.S. Defense Advanced Research Projects Agency N66001-02-8022.

Editor's Note

Reprinted with permission from the 2004 International Microelectronics and Packaging Society (IMAPS) Topical Workshop and Exhibition on Flip Chip Technology; June 21-24, 2004 Austin, Texas.

References

  1. J. P. Donoghue, "Connecting Cortex to Machines: Recent Advances in Brain Interfaces," Nature Neuroscience Supplement, Vol. 5, pp. 1085-1088, Nov. 2002.
  2. I. Obeid, J. C. Morizio, K. A. Moxon, M. A. L. Nicolelis, and P. D.Wolf, "Two Multichannel Integrated Circuits for Neural Recording and Signal Processing," IEEE Trans. BioMed. Eng., Vol. 50, No. 2, pp. 255-258, Feb. 2003.
  3. D. S. Won, I. Obeid, J. C. Morizio, M. A. L. Nicolelis, and P. D. Wolf, "A Multichannel CMOS Analog Front End IC for Neural Recordings," Proceedings of 2nd Joint EMBS-BMES Conference, pp. 270-271, 2002.
  4. J. H. Lau, Flip Chip Technologies, ISBN: 0-07-0366908-8, McGraw-Hill, New York, NY, 1996.
  5. R. Aschenbrenner, J. Gwiasda, J. Eldring, E. Zakel, and H. Reichl, "Gold Ball Bumps for Adhesive Flip Chip Assembly," VDI/VDE-IT, Adhesives in Electronics, Berlin, Nov. 2-4, 1994.
  6. M. Mojarradi, D. Binkley, B. Blalock, R. Anderson, N. Ulshoefer, T. Johnson, and L. Del Castillo, "A Miniaturized Neuroprosthesis Suitable for Implantation Into the Brain," IEEE Trans. on Neural Syst. And Rehab. Eng., Vol. 11, No. 1, pp. 38-42, Mar. 2003.
  7. J.-F. Zeberli, Ph. Clot, F. Ferrando, and J.-M. Chenuz, "Flip-Chip with Stud Bump and Non-Conductive Paste for CSP-3D," Proceeding of IMAPS 2001.

*Kulicke & Soffa's 4524AD.
**SUSS Microtec's FC150.

DANIEL N. PASCUAL, senior applications engineer, may be contacted at SUSS MicroTec, Waterbury Center, VT 05677; STEVE CALLENDER, R&D engineer, may be contacted at the Department of Biomedical Engineering, Duke University, Durham, NC 27708.