High-power LED Stud-bump Packaging
04/01/2006
Delivering a Bright Future
BY SHATIL HAQUE, LUMILEDS LIGHTING
Power light-emitting diodes (LEDs) are beginning to deliver a bright future for solid-state lighting (SSL) in high-volume consumer markets. Though small compared to conventional lighting, by 2007 power LEDs are forecasted to become 19% of the fast-growing LED market.1 Achieving this growth will require increasing brightness and efficiency, and decreasing lifetime cost-per-lumen. Initial production and testing indicates that gold stud-bump flip chip assembly with thermosonic gold-to-gold interconnects (GGIs) will contribute to progress for power LEDs.
Providing the flash function for cell phone cameras is a challenging consumer opportunity for power LEDs. Though LEDs for liquid-crystal display (LCD) and keypad backlighting will see revenue fall >40% by 2009, high-power flash LEDs for cell phones that can produce good-quality photographs at a distance of >1 m are predicted to grow at a CAGR of 87% through 2009.2 In 2003, sales of cell phones with cameras exceeded the sales of digital-still cameras. This trend is expected to continue as high-resolution 3- to 5-megapixel (m) cell phone cameras with optical zoom and flash become common, and consumers replace digital-still cameras with cell phone cameras. Higher-resolution sensors, longer-distance photos taken by optical zoom, and fill-in flash usage all require higher light levels from the flash unit than xenon performance from a xenon flash. Today, the best available LED flash for camera phones produce illumination of 60 lux at 1 m with a 1-A (4-W) pulse. High-resolution cameras will require more than 30 lux at 2 to 3 m for good-quality photos in ambient, low-light conditions.3
One technique emerging from the lead-free quest is GGI, where gold stud bumps are connected to gold pads of the substrate/package/die using a thermo-compression - heat and pressure - or thermosonic attachment process.4 The thermo-compression, die-attach technique has been used for several years, especially for high-pin-count, LCD display-driver die attachment. However, with a cycle time of 10 to 12 seconds/die, thermo-compression bonding is a slow process, which can make high-speed thermosonic assembly of high-volume parts impractical. Thermo-compression die attach also requires temperatures higher than 300°C, which could be detrimental to sensitive chips and other packaging materials, such as plastics, laminates, and epoxies.
In recent years, by using GGI equipment, suppliers have increased bumping speeds, reducing thermosonic die-attach cycle times and improving manufacturing performance. Consequently, thermosonic GGI has found high-volume manufacturing applications such as SAW filters, hard disk drive heads, hearing aids, and RFID tags. However, those stud-bump applications are generally limited to low power, low currents, and low bump counts.
Increasing light output in a small space requires higher power and currents generating more light and heat. Current solder-bump flip chip is a poor electrical and thermal conductor. Proposed lead-free solder alloys are worse thermal conductors than lead solders. Gold is a better choice for an electrical and thermal conductor. Gold stud bumps may also be shaped to a flatter profile than solder bumps, shortening the thermal path and providing a thinner product. Figure 1 shows a photoflash unit* that is only 1-mm high, with a 2.0 × 1.6-mm footprint, and generates typically 60 lux at 1 m under a 1-A (4-W) pulse drive.
 Figure 1. Photo flash unit with LED and protective diode GGI-mounted on ceramic substrate. |
While gold stud bumps meet the required physical characteristics, their value is limited unless the related manufacturing process for the specific product can support low-cost, high-volume production of reliable products. GGI packaging offers several manufacturing advantages over conventional-solder flip chip packaging.
Gold-based interconnection offers a shorter and simpler process flow than existing solder-based flip chip processes for high-power LEDs. A typical, solder-based flip chip application includes flux application before flipping the die for a high-temperature reflow. Flux requires carefully controlled application, and flux residues may require cleaning so that they will not contaminate optical surfaces. The GGI process offers flux-free assembly.
Stud bumping and thermosonic connection require processing temperatures of 150 to 160°C, which are below solder-bump reflow temperatures of 220 to 230°C. A low-temperature bumping process allows a wider selection of other packaging materials associated with package fabrication.
Proposed lead-free alloys have higher reflow temperatures than eutectic lead-tin.
Most LED packages are based on clear epoxy that cannot withstand the higher temperatures required by lead-free solders. Maintaining the present packaging system is a cost-advantage of gold bumps that avoids the materials selection challenges, manufacturability concerns, and reliability aspects of developing new LED packaging to accommodate proposed lead-free alloys.
The high thermal conductivity of gold interconnects allow higher temperature operation than conventional LED packaging. The maximum allowable junction temperature of an LED, which determines light output, will no longer be limited by the device interconnects.
Cost and Throughput
Because stud bumping is a serial process, costs depend on bumping speed and the number of bumps-per-wafer. Stud-bump bonder manufacturers have improved bumping speed and accuracy, and several offer high-speed stud bumpers that can place 20 to 30 bps. These new-generation, stud-bump bonders can run continuously in manufacturing environments, while providing accurate bump placements (±3.5 µm at ±3 σ) with controlled bump height variation (±3 µm at ±3 σ for flat bumps).
 Figure 2. Cost comparison of stud bumping to other wafer-bumping methods. Courtesy of Kulicke & Soffa. |
This combination of high-speed operation and high process yield reduces the cost of stud bumping in high-volume applications. Equipment manufacturers can provide cost analysis models taking into account machine depreciation, floor space, overhead cost, and machine use. The resulting cost-of-ownership model is developed around a customer’s specific application. Figure 2 shows an example cost-comparison model of different bumping methods. Depending on number of bumps-per-wafer, bump height, and number of wafers being bumped, stud bumping can be a low-cost option.
Bumping Process Controls
Close process control of some key stud bump parameters is critical for manufacturing success and includes bump size and shape, bump placement accuracy, and bump shear strength. Similarly, stringent controls are required in assembly.
Bump Size and Shape: Bump dimensions are programmable to fit design needs. The bump layout, and size and shape test criteria are typically determined by the substrate and die-pad layout. Simple thermal modeling insures that bump designs meet required thermal-management criteria. Bump size and shape criteria include acceptable ranges of bump diameter, ball height, and bump height. Wire-tail height and curve angle might also be specified. Size and shape monitoring requires a well-designed sample plan for reliable optical inspection. Optical scanning is fast, typically accurate within ±1 µm, and can measure heights of bump arrays at several bump levels.
Figure 3 shows an optical scan of a single stud bump’s horizontal diameter, ball height to the shoulder, and overall bump height to the tip. Repeated scans of many bumps provide critical dimensions for process control calculation.
 Figure 3. Stud bump size and height scan for inspection. |
Bump Placement Accuracy: Unlike solder bumps, stud bumps are not self-centering, so initial placement accuracy is critical. Monitoring bump placement accuracy maintains electrical performance and yield. Substrate metallization problems, such as pattern run-off and improper fiducial metallization, cause pattern-recognition failures, leading to off-set bumps.
Bump Shear: The robustness of a stud-bump connection is determined by the quality of gold diffusion between the gold bump and substrate. However, bump shear data alone does not guarantee successful bumping. Visual inspection of the shear mode is critical, and the sheared-bump interface must show signs of gold diffusion. Little or no trace of diffusion indicates a poor joint, which may lead to reliability failures.
Thermo-mechanical Stress Testing
Consumer applications for high power LEDs require components to pass the list of reliability stress tests shown in Table 1 without failures. The user environment also adds special testing including mechanical shock, vibration, and surviving a drop to a concrete floor. The thermal, thermo-mechanical, and cross-section test results establish that gold stud bumps provide reliable joints between the LED and the substrate.
 Table 1. Reliability tests. |
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Conclusion
Gold stud bumps provide a packaging solution for high-power LEDs, meeting a previously unachievable combination of requirements: 100% lead-free packaging; pulsed, high-power, and continuous operation at high LED junction temperature; and SMT assembly compatibility to withstand 3 reflows at lead-free solder temperatures.
*Lumileds GGI Photoflash Unit
Acknowledgements
The author would like to thank his colleagues at Lumileds Lighting for their contributions to this article.
References
- “High Brightness LED Market Review and Forecast,“ Strategies Unlimited, Report OM-26, July 2003.
- “Report: LED revenue to fall 41% by 2009,” EE Times, 2005/12/05.
- Packaging of High-power LEDs Using Au Stud Bump Interconnects,” S. Haque, M. Ng, G. Abrahamse, F. Wall, S. Rudaz, P. Martin, SMTA 2005 Emerging Technologies, September 2005.
- L. K. Cheah et al., “Gold to Gold Thermosonic Flip Chip Bonding,” Proc. HDI 2001, pp. 165 - 175, April 2001.
SHATIL HAQUE, Ph. D., manager, die-assembly competence group, may be contacted at Philips Lumileds Lighting Malaysia, Lebuh Kampung Jawa, Bayan Lepas FIZ-3 11900 Penang, Malaysia; 60/4-616-3262; E-mail: [email protected].