IN THE NEWS
11/01/2007
SMTAI Brings Packaging on Board
ORLANDO, FL - SMTA International, Oct. 7 - 11 left its Midwest roots, broke away from the ATExpo in Rosemont, IL, and had a successful show at the Gaylord Palms Resort and Convention Center. One of the notable differences besides location was the number of technical sessions and panels dedicated to advanced packaging issues.
Many sessions dealt with the RoHS revolution, and this affects both board and packaging especially in regulation and reliability areas. Vapor phase, an old method of reflow long thought to be phased out a decade ago, reappeared in the session, “Vapor Phase Solutions for Emerging Challenges.” The higher heat for reflow required of lead-free boards can be more than 25°C hotter than with boards using leaded solder paste. And the lower temperatures and gentle method of vapor phase represents an easier process for dense, stacked, or large advanced packages as well.
In the package-on-package (PoP) session lead by Julian Partridge, Ph.D., of Staktek Corp., Dongkai Shangguan, Ph.D., of Flextronics International talked about process development and reliability evaluation for inline PoP assembly. Vern Solberg of Tessera, Inc. presented a paper on low profile NAND Flash stacked packages. Paul Wood of OK International talked about reworking PoP.
![]() Matt Kelly, IBM; Alan Rae, Ph.D., Nanodynamics, and Peter Biocca, Kester discuss nanotechnology solder powders and reduction of copper dissolution. |
Additionally, quite a few papers dealt with flip chip bumping, assembly, and repair. Pac Tech USA, Hesse & Knipps, Inc., for instance, exhibited at the show, but these types of back-end equipment suppliers were in short supply.
![]() Mike Foster, of Samsung exhibited at SMTAI. |
Gail Flower Advanced Packaging’s editor-in-chief, moderated a panel discussion, “Thermal Management: The Heat Is Off”, featuring five industry experts discussing how to control thermal issues. The room was filled to capacity when Alan Rae, Ph.D., NanoDynamics; Brian Toleno, Ph.D., Henkel; Jordan Ross and Karthik Vijayamadhavan, Indium Corporation; and Seri Lee, Ph.D., Nextreme shared their ideas. Many solutions emanated from this session - heatsinks, adhesives, greases, phase-change materials (PCMs), metal thermal interface materials (TIMs), compressible heat-spring materials, solder, thin-film thermoelectric cooling devices made of thin-film materials forming miniature heat pumps, alumina nano-layer coatings, submicron films, and others. Though the audience represented more board-level engineers’ solutions for thermal problems from increased package and board densities, this affects electronics on many levels.
STC Releases First Draft of Industry Terminology Specifications
NIWOT, CO - The first draft of terminology specifications for the Semiconductor Test Interface eXtensions (STIX) initiative has been published by the Docking & Interface Working Group (DIWG) of the Semiconductor Test Consortium, Inc. (STC). Additionally, the consortium organized working group meetings and hosted the annual consortium dinner event at the International Test Conference (ITC), held October 23-25th in Santa Clara, CA, in an effort to build momentum around the initiative.
The STIX initiative addresses rising cost and efficiency challenges in the automatic test equipment (ATE) arena, through the collaborative efforts of companies spanning the semiconductor supply chain. Successful standardization of terminology specifications is said to increase supply chain efficiencies and reduce the risks arising from miscommunications between design, manufacturing, sales, and purchasing personnel.
According to Bob Helsel, STC manager, five teams were established from 24 working group members representing 14 companies. “Efforts were coordinated and initial results published in less than a year,” he noted. “This level of cooperation and progress highlights the commitment the test industry is making to the STIX initiative. It also illustrates that important, long-term test challenges are being addressed effectively by working in the open and collaborative structure of the STC.” Although DIWG has been working for less than a year, it has determined standard terminologies in critical, interface-related areas, including the X-Y-Z axes with respect to test head orientation, convention for contact sight numbering, minimum set of docking interface connections, and defining the various interface levels for the test head, load board, contactor, and handler.
Nextreme Relocates and Expands Production
DURHAM, NC - Plans to increase production capacity and meet flip chip demand has resulted in new digs for Nextreme, manufacturer of micro-scale thermal and power management products for the electronics industry. The company reportedly is relocating and expanding its North American corporate headquarters and manufacturing facility within Research Triangle Park, NC.
The expansion was necessary to facilitate the evolution of the company’s thermal copper pillar bump technology from product qualification, pilot production, and ultimately volume production. The technology is expected to remove barriers of large-scale implementation of embedded thermal and power management in flip chip applications, noted Jim Mundell, Nextreme CEO, adding that the technology is expected to represent exponential growth for the company
The 14,000 sq. ft. state-of-the art facility includes semiconductor-grade clean rooms and an advanced application laboratory The new facility is located at 3908 Patriot Drive, Durham, NC 27703. Nextreme expects to complete the move by the end of December 2007.