Flux and Underfill Compatibility in a Lead-free Environment
08/01/2007
BY RENZHE ZHAO, QING JI, GEORGE CARSON, MICHAEL TODD, and GARY SHI, electronics group of Henkel
Since their introduction nearly 20 years ago, the benefits of integrating flip chips into modern devices have been well proven. By design, the face-down, active-side attachment of the chip onto a substrate, at either the package or board level, provides advantages such as shorter and more efficient interconnections, lower inductance, higher operating frequencies, better noise control, higher density, higher I/O counts, and smaller device footprints.
 Figure 1. Flip chip assembly process. |
While the benefits are clear, challenges associated with flip chip technology still exist. There are hurdles to overcome regarding thermal processing capabilities, the subsequent stresses induced on the solder joints, and the compatibility of the underfill and fluxes used to accommodate these stresses. When flip chip interconnections are reflowed directly onto a laminate, there is a significant coefficient of thermal expansion (CTE) mismatch between the chip and the substrate. Because of this CTE differential, during the thermal cycling of the assembly, thermo-mechanical stresses are imposed on the solder joints and can result in early failure of the device. To alleviate this stress and improve solder joint reliability, underfill systems are commonly used. Though there are various underfill technologies such as no-flow (or fluxing) underfills and wafer-level pre-applied underfills, the focus here will be on the most common flip chip underfill system: capillary flow underfills.
Basic Capillary Underfill Process
When using capillary flow underfill systems for flip chips, the process is similar to that of the chip-scale package (CSP) underfill procedure. The die is picked up by the die placement machine, flux is applied to the solder bumps via dipping (or flux is applied to the pads on the substrate via spray fluxing), the die is placed onto the substrate, the device is reflowed, capillary underfill is dispensed, and the underfill is cured (Figure 1). In a flip chip assembly process, a flux application step is absolutely critical, as it serves to remove surface oxidation from the solder and the substrate metallization, which promotes better solder wetting and, thus, better solder joint formation. The tacky flux used in flip chip assembly also prevents die movement prior to solder reflow, which is essential to reliable joint formation and the ultimate long-term reliability of the product.
Lead-free Challenges and Underfill/Flux Compatibility
While flux is essential to the overall success of the flip chip process, it can also pose issues with underfilling, because the residue left behind by no-clean flux may interact with the underfill materials and cause process issues or field failures.1 Once reflowed, the residues left behind by the flux are most likely responsible for underfill voids and/or delamination. With the advent of lead-free, elevated process reflow temperatures have changed the characteristics of the flux residues and the underfill; the flux compatibility issue becomes even more profound.
 Figure 2. Flux residue causes insufficient underfill wetting and voiding. |
To examine this condition, a study was conducted to analyze several different commercially available fluxes and underfill systems, and evaluate their compatibility within a lead-free assembly environment.
Study Design and Results
Five commercialized fluxes and more than ten underfills of different chemistry systems were used in the investigation. The test component was a 14.4- × 14.4-mm flip chip with silicon nitride passivation and Sn/3.5Ag/0.5Cu bump metallurgy with a full-array bump pattern of 3,840 bumps at a 225-µm pitch. The substrate was a four-layer, 10-mm-thick bismaleimide triazine (BT) laminate with a PSR4000 AUS5 solder mask. The substrate pads were electroless nickel/immersion gold (ENIG).
The assembly process consisted of 2-mils flux dipping, a reflow profile with a peak temperature of 245°C, and flip chips that were underfilled at 90°C. After underfill curing, parts were subjected to JEDEC level 3 moisture testing, followed by three reflows at 260°C. An acoustic microscope and cross-sections of the interconnections were used to analyze and verify the results.
 Figure 3. Underfill delamination at the board level. |
Results revealed that flux compatibility can affect flip chip assemblies in two ways. During the underfill process, a thin film of flux residue on the solder bump, substrate, or die can alter flow behavior of the materials by varying wetting properties of the underfills to the wetting surfaces. In the case where the flux residues and underfill chemistries are not compatible, underfill voids may occur. Two examples of this can be seen in Figure 2, where the left image illustrates poor wetting onto the surface of the solder balls, and the image on the right shows insufficient die passivation wetting, both resulting in voids.
Study data confirmed that flux residue can affect flip chip assembly reliability by significantly reducing interfacial adhesion between the underfill and surfaces (either the board or the die). Underfill delaminates from the surface when the device is stressed by environmental factors, such as temperature change and/or moisture absorption. In Figure 3, cross-section images reveal delamination after the 3× JEDEC 260°C reflow test. Delamination initiated at the interface between the underfill and the flux residue, and then propagated along the solder mask.
It is also important to note that the flux residue may have little to no effect on the underfill at one level, and may cause significant issues at another level. For example, it has been observed to cause no change at the board level, but induce delamination at the die level.
 Figure 4. Good compatibility between underfill and flux. |
In addition, and not surprisingly, flux compatibility is highly chemistry dependent. Several underfill systems used in this study were compatible with a wide range of fluxes, while others were only compatible with one or two fluxes. While the underfill-flux combination seen in Figure 3 resulted in delamination, the results are good when the same underfill is used with a different flux (Figure 4).
So, what should manufacturers do to solve these incompatibility issues? There are several options, including the obvious solution of using flux-compatible underfills or underfill-compatible fluxes. This, however, would require multiple rounds of testing and analysis for each new product build, which is neither practical nor time-sensitive. It might also be suggested that all fluxes - regardless of whether they are water-wash or no-clean - go through a cleaning step to remove flux residues. However, in an environment of cost-consciousness and faster cycle times, this would add another expense and extend the overall process time. Additionally, even when fluxes are cleaned, there may be residues left behind because it is not a fool-proof procedure. The most cost-effective and reliable approach, therefore, is to develop robust flux and underfill material sets with proven compatibility and guaranteed reliability.
Conclusion and Future Development Work
Flux and underfill compatibility is a profound and problematic dilemma faced by flip chip assemblers, particularly those manufacturing in the elevated temperature environment of lead-free. The voiding and delamination problems that exist due to underfill and flux incompatibility can result in catastrophic device failure. The most viable and cost-effective solution for amending these issues is the development of next-generation flux and underfill material sets that are designed to work together. New materials are currently undergoing research and development; state-of-the-art tacky fluxes and advanced amine-based underfill systems for both lead-rich and lead-free applications will soon be commercially available. Flip chip and its inherent advantages far outweigh the potential problems posed by the process; device manufacturers and materials formulators must work together to ensure the reliability of this product-advancing technology.
References:
- G. Carson and M. Edwards, “Factors Affecting Voiding in Underfilled Flip Chip Assemblies,” Proc. Technical Program, SMTA International, 2001.
Contact the authors for a complete list of references.
RENZHE ZHAO, senior applications engineer; QING JI, technical manager, electronics liquids; GEORGE CARSON, technical director, applications engineering; MICHAEL TODD, global director, product development; and GARY SHI, technical director, Asia-Pacific, may be contacted at the electronics group of Henkel, 15350 Barranca Parkway, Irvine CA 92618; 949/789-2509; E-mail: [email protected].