Cooling High-power Packages
08/01/2008
BY KAVEH AZAR, Ph.D. Advanced Thermal Solutions
Higher frequency signal processing and limits on the passage of electrons through metallic media have forced the electronics industry to use smaller component packages. But high-power dissipation from smaller packaging creates heat fluxes beyond conventional cooling technologies. Engineers must cool these devices at either the package or system level. These challenges must be addressed by designers when choosing or developing successful solutions.
Take, for instance, power and frequency. Device power dissipation as a function of frequency and number of gates is shown below:
- Power Dissipation (W) ~ Switching Power
(??W/NG/MHz)
x the No. Gates
x the Frequency (MHz)
Table 1 shows the impact of frequency on a 5 million gate device operating at 200 MHz. To deliver higher frequency and consequently higher power devices, thermal management becomes a challenging gating factor and plays an important role in the thermal performance of the system. The heat flow path from the source to the heatsink must be considered to effectively design or select a cooling system.
 Table 1. Device total power dissipation for a clock frequency of 200MHz and gate power switching requirement of 0.15 µW/NG/MHz. |
In this process, the environment is the ultimate heatsink into which generated heat is eventually discharged. This can be the surrounding air or a water reservoir. To successfully design or select a cooling solution, the cooling system box — which includes the chip package, interfacial contacts, spreading resistance and the cooling device, (e.g., heatsink) — needs to be carefully considered.
 Figure 1. Application of a thermally conductive compound on a MCM. |
Along with increasing heat fluxes, packaging issues pose a major challenge. Take for example the integration of a small die in a larger package. To accommodate the device I/O, thermal spreaders are often used to cap the die. Contact and spreading resistances can become the negating factors. Challenges of a multi-chip module (MCM) used in a high-end system include: achieving and maintaining the chip-to-cap gaps due to the close proximity, non-coplanarity, and tilts of the multiple chips; chip and capacitor re-work; sealing the MCM to prevent dry-out of the thermal paste and corrosion of controlled collapsed chip connections (C4s); and maintaining the package’s mechanical integrity during the assembly process and operating life. Figure 1 shows the application of the specially designed, thermally conductive compound using a screen template, as well as the design details required to properly apply and implement thermal interface materials. These materials ensure that the heat from the die is carried to the exterior of the package. Any voids or additional contact resistance that occur with the use of these compounds will thermally jeopardize the device.
 Figure 2. A futuristic microprocessor package using microchannels and an embedded thermoelectric device. |
To minimize the junction temperature of a high power device, an interesting concept using a thin film thermo electric cooler (TFTEC) was proposed (Figure 2). In this case, the TFTEC is embedded on the backside of the die and a micro-channel cold plate is used for the thermal transport. The initial study considered a perfect contact at different interfaces, resulting in a dramatic 15??C temperature reduction. But once contact resistance and the TEC’s electrical performance were taken into account, the improvements were on the order of a few degrees. It was concluded that the thermal contact resistance plays a dominant mitigating role.
Considering the small die size and the high power dissipation, thermal spreading resistance will play a pivotal role in the choice of the package type and cooling system. In such devices, spreading resistance is often the largest resistor on the path of heat transfer. Its minimization results in successful thermal design.
 Figure 3. A BGA package with forced thermal spreader. |
One novel concept minimizes spreading resistance by using a forced thermal spreader (FTS) in a package (Figure 3). The FTS distributes the concentrated heat of the small die to the larger base area of the heatsink. The heatsink transfers the heat to the ambient. The built-in FTS combines micro- and mini-channels in the silicon package. The water flow rate inside the channels is approximately 0.5~1.0 L/min, and the FTS is directly bonded to the die.
 Table 2. Thermal performance of a BGA cooling system* with a die size of 10 x 10 mm. |
Simulation results for this novel packaging are shown in Table 2. Columns one, two, and three depict the planar area of the heatsink, the total thermal resistance, and the conductive resistance for a heatsink made of a material with thermal conductivity equal to or higher than diamond. The die size for this study was 10??10 mm.
 Figure 4. 3-D rendering of the assembled microchannel cooler. |
Thermal transport also needs to be managed to dissipate the high heat fluxes in today’s electronics. In one application, a chip needed to operate at 400 W/cm2. Micro-channels were fabricated inside the package to provide the required cooling for operating this chip. (Figure 4) The attained heat flux for the desired junction temperature exceeded 400 W/cm2. The flow rate was 1.2 L/min and the pressure drop was 30 kPa.
Conclusion
Industry trends clearly point to increased power dissipation in modern electronic packages. High-power devices — those with heat fluxes exceeding 250 W/cm2 — pose unique thermal and mechanical packaging issues. Contact and spreading resistances are the mitigating factors for successful design. The work of many researchers shows that successful implementation of high-power devices requires a departure from standard packaging. The use of silicon embedded with micro-channels, forced thermal spreaders, or other packaging concepts requires rethinking of the entire system architecture. To move these packages from specialty to mainstream electronics will require a fundamental restructuring of coolant delivery systems, cooling system reliability, and overall thermal management budgets.
References
Contact the author for a complete list of references.
KAVEH AZAR, Ph.D., President and CEO may be contacted at Advanced Thermal Solutions, Inc., 89 Access Rd, Norwood, MA 02062; 781-769-2800; [email protected].