Tweaking cleaning technologies

06/01/2001

Mark A. DeSorbo

MUNICH, GERMANY—As the semiconductor industry continues to churn out smaller and faster devices for everything from high-performance integrated circuits to micro electromechanical systems (MEMS), efficient cleaning, defect removal and higher yield remains the creed for chipmakers and equipment manufactures alike.

Many keep this vigil as they migrate toward smaller geometries and copper and low-k processes, chasing the 300 mm dream, while unlocking mysteries of present technologies.

Whatever the endeavor, the need for substrate cleaning has never been greater.

And newer technologies seem to generate innovative cleaning techniques and devices. That's the case with Karl Suss, an equipment maker that has just introduced a cleaning and bonding system, and The SEZ Group (Zurich, Switzerland), which is collaborating with Pure Wafer Ltd. (Swansea, Wales) to evaluate double-sided cleaning on 300 mm wafers utilizing SEZ Spin-Process technology.

"Cleaning has always been a high priority, but it has become more critical because of larger wafers and smaller geometries," says Bob Spector, a member of the CleanRooms Editorial Advisory Board. "Back in the early 1980s, there was more flexibility because of the design. That flexibility no longer exists."

Flexibility and efficiency is key, says Chuck Fraust, director of environment, health and safety for the Semiconductor Industry Association (SIA; San Francisco).

"We are always looking for new ways of cleaning, in terms of using less water, fewer chemicals and more robotics, in an effort to increase yield, decrease defects and provide a safer environment for personnel," Fraust says.

Strange bedfellows
That belief seems to be embodied in the collaboration between SEZ and PureWafer, a venture that will be an evaluation of SEZ's new cleaning technology for 300 mm, an alternative for batch cleaning applications.

Pure Wafer, a supplier of silicon wafer reclaim, will take delivery of a SEZ one-chamber beta evaluation tool incorporating the same technology used in the recently introduced four-chamber Spin-Processor 8300. The tool has four three-level process chambers that clean the front and backsides of wafers simultaneously. According to SEZ, it also eliminates re-deposition and cross-contamination because chemicals are spun off the wafer surface and handled only in the wafer exclusion area.

Ernst Gaulhofer, vice president of field support and process applications for SEZ, says that many challenges presented by the move to 300 mm substrates using 0.13 micron-technology, which typically features copper metalization and CVD-low-k dielectrics. The ultimate goal by mid-2002, he says, is migrating to 0.1-micron technology, which will lead to trials of higher k-rate and capacitor and new low-k metalization dielectrics.

"Standards for 300 mm substrates have been defined with tighter and harder specifications, which result in higher requirements for cleanliness of prime wafers and cleaning in general on a dramatically increased surface area," Gaulhofer says. "The 300/0.13-micron technology requires particle, metal and other contamination metrology. Also, surface roughness and wafer warp is of big concern."

Pure Wafer, he explains, will evaluate the beta tool's hardware, process performance and production worthiness for cleaning applications. The agreement between SEZ and Pure Wafer can be extended for other processes by mutual agreement. As a part of the agreement, SEZ will supply the beta tool to Pure Wafer for six months with the possibility of extra evaluation time at Pure Wafer's request.

"PureWafer represents a unique platform to generate such data in high volume as they are a high-end wafer reclaim company doing reclaiming by CMP-polishing and final cleaning only on 200 and 300 mm wafers," Gaulhofer says. "The [collaboration] with Pure Wafer targets to directly compare single-wafer cleaning technology with automated wet benches for 300 mm."

New gadgets
Like the SEZ spin processor, the CL200 cleaner and silicon-on-isolator bonder is Karl Suss' answer to the demand for higher performance in silicon, says Joe Brown, a MEMS specialist at Karl Suss.

The CL200 cleans, dries, aligns and bonds in one closed chamber with a specific atmosphere, and the use of SOI, Brown explains, can provide the necessary isolation to help prevent temperature-limiting breakdown.

"Today, a common device process is SIMOX, the implantation of oxygen below the surface of the silicon substrate that forms a layer used for dielectric isolation," he says. "This method is costly and has practical limits to the layer geometries."

Bonded silicon-on-isolator (BSOI), Brown says, are joined together by silicon fusion, a method that joins two hydrophilic, mirror-polished, flat and clean silicon surfaces at high temperature. The CL200 processes two wafers simultaneously without separation between process steps. The closed chamber acts as splash protection and creates a mini-environment with a controlled nitrogen atmosphere for optimum process control. The semiautomatic machine can be upgraded to a fully automatic substrate bond cluster.

"Substrate cleaning and flatness are the two most critical factors to BSOI," says Brown. "Any particles, even sub-micron particles, can create voids. Cleaning prior to bonding is critical to the yield of the SOI layer. What this implies is additional process latitude and the ability to condition the interior of the final substrate. In the world of MEMS, this is vitally important for release structures required for mechanical movement."

According to the company, optional cleaning with diluted standard cleaning chemicals is offered for process development. Final cleaning, however, is performed by megasonic activation. The system can remove fine particles greater than or equal to 0.1 micron from the wafer surface. Spinning wafers at high speed with infrared heat completes the drying process, while alignment is created by floating each substrate to reference pins at the flat and the edge.

Brown says the Fraunhofer Institute of Engineering, Manufacturing and Automation (Stuttgart, Germany) evaluated the CL200 and indicated that it demonstrated very low contamination, high cleaning efficiency and excellent bonding results. Two units have already been sold to major semiconductor and MEMS/MST manufacturers in the United States and Europe.

"The technique has been proven at 200 mm, but has not been tested for 300 mm," Brown adds. "However, understanding the principal of operation would seem likely that similar results could be obtained."

According to Markus Gabriel, the CL200 product manager, military and aerospace applications and industrial equipment manufacturing have driven SOI device demand. This demand is expected to increase while gradually shifting to data processing, communications and consumer electronics.