Issue

Among the reasons typically cited for delaying the adoption of environmentally friendly designs and processes for semiconductor fabs are the added costs associated with energy-efficient and emission-reduction technologies, and the fact that manufacturers are fully occupied addressing next-generation technology-node challenges.

Gartner Inc.’s October forecast projected $54.56 billion in semiconductor capital spending this year, representing 15.1% growth, slightly below its July forecast.

With thermal budgets becoming tighter at advanced nodes, some memory manufacturers are moving from batch furnaces to single-wafer tools.

Most semiconductor manufacturers expect 193nm immersion lithography to remain the dominant patterning technology through the 32nm technology node.

The semiconductor industry requires a tremendous amount of investment. It takes some creativity and careful planning, but there are ways to generate better returns on that investment.

Development of carbon nanotube (CNT) interconnects for the 32nm node is starting to make major strides.

Mask CD uniformity requirements continue to tighten in response to the shrinking wafer CD uniformity budget and the upward trend of the mask error enhancement factor (MEEF).

Improved optical proximity correction is needed to meet the tighter CD control budgets for advanced lithography processes. Laser bandwidth variation is one of the factors that contributes to the optical proximity effect (OPE).

As MOSFET device dimensions approach their fundamental limits [1-3], parametric variation in manufacturing has become a critical limiting factor for device performance and design yield of advanced CMOS technologies [4-7]. The sources of variation extend beyond traditional intra-die (across-the-chip) and inter-die (chip-to-chip) variation into complex lithographic, thermal, doping, and stress sources.

The inherent challenges for traditional ion implanters to deliver sufficiently high beam currents at sufficiently low energies required for shallow doping applications, such as USJ and polysilicon doping for DRAM, have motivated the development of alternative methods for shallow doping.

A new class of complex copper indium gallium selenide (CIGS) thin-film materials, discovered and developed by HelioVolt, self-assembles into two interpenetrating phases-as if it were an ‘electronic mayonnaise’-with constant electrical properties despite slight changes in composition.

Following are the Top Products of 2006 in semiconductor/thin-film processing, selected by Solid State Technology’s editorial advisory board from those featured each month in Product News.