Issue

It's rare that you can have the best of both worlds, but that's exactly what Solid State Technology offers our readers.

At this year's International Strategy Symposium, speakers from major equipment and materials companies pointed out that R&D and other costs have moved upstream in the semiconductor supply chain, from chipmakers to their equipment and materials suppliers.

In the early days of CMP, most of the focus was on developing the technology as a relatively stable process and enabling its usefulness, particularly for dielectric CMP.

Solid State Technology asked experts about the growing perception that R&D is becoming too commercialized while the industry struggles to make innovation profitable.

Since they were introduced into semiconductor processing in the 1970s, ion implanters have been characterized by change. An explosion of implanter architectures has occurred in the last decade.

Metrology techniques such as atomic force microscopy and cross-sectional tunneling electron microscopy, while able to provide full 2D profile metrology with the requisite precision, have inadequate throughput to allow for proper statistical sampling necessary to control a volume manufacturing line.

The introduction of low-k and ultralow-k dielectric films in copper-interconnect structures presents serious challenges in advanced device test, assembly, and packaging.

Microelectronic-based biosensors consist of a physicochemical transducer in direct contact with a biological recognition element such as antibodies, DNA probes, cells, neurons, and so on.

Etch requirements for four basic deep Si processes — bulk, precision, SOI, and high aspect ratio — are presented and contrasted.

A 2-in-1 integration scheme — in which the barrier removal and photoresist strip are done in situ following dielectric etch — is proposed.