Issue

It's widely believed that protecting the environment is a costly exercise for industry, requiring expensive add-ons such as scrubbers and retreatment plants.

Articles from around the world.

Corporate Research at Infineon Technologies, Munich, Germany, has demonstrated the combination of electronic circuitry for test analyses with biochemical test sites on a single silicon chip — a so-called biochip.

Beginning a presentation at MRS' Spring Conference with a photo of rat bone tissue may seem a bit unorthodox, but Paul Calvert, professor of materials science and engineering at the University of Arizona, did have a point.

Challenges presented by low-k₁ lithography were explored at the recent Microlithography Symposium in a session chaired by Tony Yen of Sematech.

Engineers at Japan's big chipmakers — including Hitachi, NEC, and Toshiba — are worried their companies might not make it through another year.

Total foundry wafer demand declined by 39% in 2001. That's a far cry from the 40% growth foundry players experienced in 2000, but Semico Research Corp. is still bullish on their continued growth.

The challenges of maskmaking have broadened in scope and deepened in complexity in the last decade as the industry forges ahead with the mantra "faster, denser, cheaper."

Issues associated with the integration of CVD low-k dielectrics for 100nm technology node applications are described, including key film properties and factors determining successful integration into advanced DRAM and logic interconnect schemes.

Reticle structures comprising properly spaced pairs of chromeless phase edges with 100% transmission regions between can project very fine circuit images using high-numerical-aperture exposure tools equipped with off-axis illumination.

Forecasting which technology will be used to accomplish feature shrinks is a challenge that has humbled many of the best minds in our industry.

The low-temperature (550-750°C) solid phase epitaxial method of forming shallow junctions is an attractive activation technique for the 65-70nm node and beyond.

Integrated device manufacturers continually seek ways to lower costs in every segment of the manufacturing cycle.

Advanced-design point-of-use dry pumps are cleaner, quieter, and more efficient than traditional dry pumps.

A microtensile method, used to evaluate material properties of thin films, features test specimens designed and produced using common wafer-processing steps.

Wafer-level packaging is gaining popularity because it reduces the size of a package to that of the IC itself, and it lowers package costs by allowing the fabrication of the package in a batch process.