Issue

For years the industry has talked about putting metrology instruments into process tools, or at least hooking them up in-line, so that wafers could be monitored either during processing or right afterwards.

Numbers rose across the board as the industry headed toward the end of 2001, with equipment orders, chip sales, and front-end capacity utilization all up for the month of October.

Curing blindness, limitations of CMOS are topics at MNC; Diagonals: A shorter path for interconnect ...

Who would have thought it only a few months ago? China seems to be growing an entrepreneurial semiconductor foundry industry thanks to the success of an aggressive drive to recruit industry talent from Taiwan.

The market potential for microelectromechanical systems (MEMS), like everything else in high tech, has been in flux. Yet, a recent forecast (Table 1) indicates opportunities still exist across a broad segment of applications.

ICPECVD for low-temperature SiNx films; High-resolution optical microscope; Plug-and-play pumping system; Process monitoring for CVD and etch ...

Solid State Technology has been working with the leaders of various technical working groups of the 2001 International Technology Roadmap for Semiconductors (ITRS) to outline highlights and crucial changes in the new ITRS for a broad range of fab operations, beginning here with front-end processing and continuing through wafer-level test.

The smaller features and tighter tolerances in the 2001 ITRS deliver the message that the industry is clearly approaching the physical limits of optical lithography (Table 1).

The 2001 International Technology Roadmap for Semiconductors (ITRS) reflects two overall messages: the entrenchment of international consensus building and yet tighter periods between industry technology nodes.

The 2001 ITRS continues to reflect the hierarchical wiring design trend featuring reduced aspect ratios (as an alternative means of reducing capacitance) and less aggressive scaling of the dielectric (see the table).

Successfully realizing the potential of ITRS targets requires an integrated factory that takes full advantage of its technologies to achieve device feature size reductions, near 100% yield, wafer-size increases, and other manufacturing productivity improvements (see table).

Metrology continues to be challenged by the accelerated introduction of new technology generations as well as new materials and structures (see the table). In addition, new measurement requirements...

Wafer probe technologies face complex electrical and mechanical challenges driven by product specifications, test implementation requirements, test productivity goals, and reduced test cost demands (see table).

A new wafer-level chip-scale package provides an integrated cavity above the active area of a MEMS device. This package was designed for devices with mechanically moving components such as micromirrors, miniature gyroscopes, and acceleration detectors.

Miniaturization of sensors and electronics has led to several recent advances in high-vacuum gauges, including extended ranges and smart capabilities, as well as smaller size. For example, the range of Pirani gauges has been extended down to 10^-5 torr, response time has been reduced, and electronics are integrated on the same chip as the sensor.