Issue

While the world is madly scrambling to build information superhighways, we are also seeing the beginnings of the gadgets that will provide the on and off ramps.

Book-to-bill drops, but shipments and bookings rise
North American manufacturers of semiconductor equipment logged record shipments and bookings for the month of July but Semi (Semiconductor Equipment and Materials International) reported that the book-to-bill ratio hit a six-month low at 1.23 (see figure).

While practical quantum computers are still very much a scientific endeavor, a presentation at the recent Hot Chips 2000 conference clearly confirms what has been a rather phenomenal theoretical prediction.

New markets are emerging for flip-chip assemblies, and ESEC (Cham, Switzerland) is leveraging its strong position in the die bonder arena to address these in a new way.

Only two years after the first conference papers outlined the new technology, the first wafer-scale chip packages are showing up in commercial products. Casio Computer Company Ltd.

Automotive applications, as an end-user market, was the fastest growing semiconductor segment in 1998, although only 5.5% of the total semiconductor market, according to a recently published market report.

The Air Liquide Group, Paris, France, has named Pierre Dufour head of North American operations, based in Houston, TX. Dufour becomes CEO of Air Liquide America Corp ...

Semiconductor seminars -- This seminar series will focus on Semi S2-0200 Safety Design Guidelines and Semi S8-0999 Ergonomics Guidelines, and will provide device manufacturers fundamental safety design concepts for semiconductor equipment ...

High-voltage DC power supplies brochure -- With output voltages up to 360kV and power levels to 18kV, the supplies described in this brochure produce the low-ripple and high-stability outputs required in semiconductor manufacturing applications ...

CVD cluster tool -- The Planar fxP single-wafer cluster tool offers a complete dielectric roadmap to 0.1mm production on a single product platform. It uses proprietary Flowfill and Low K Flowfill technologies for standard and low-k IMD dielectrics, enabling logic and DRAM manufacturers ...

The smaller dimensions associated with continued transistor scaling offer the opportunity for a detailed re-examination of the role and usefulness of silicon wafer specifications.

Automated SEM sample preparation avoids many of the pitfalls associated with analyzing today's advanced materials. For example, no matter how carefully they were prepared or what processing tricks were used — ion milling, for instance — conventional manual cleaving of wafers typically resulted in artifacts on samples of HOSP, a contending low-k dielectric material.

Typical wafer fabs take advantage of only a small portion of the information contained in the large quantity of metrology data that they generate. By looking at the behavior and interaction of parameters over time in new ways, much more real-time information about the process and equipment can be derived.

Semiconductor manufacturers using RTP have traditionally been limited to the use of variable intensity, lamp-based systems of increasing complexity and cost. Here we describe an alternative approach — a simple, effective, furnace-based RTP. The tool described is the Axcelis Summit RTP system, with the main focus on its wafer temperature uniformity, measurement, and control.

A generic factory is the root model that can be easily altered to perform experiments to evaluate 300mm fab layouts and operations, in this case a factory running a single 180nm logic process flow and starting 20,000 wafers/month. Experiments performed have included looking at the effects of various factors on factory productivity as defined by cycle time, work in process inventory, and tool utilization.

With 300mm wafer processing, the industry should finally realize the dream of hands-off wafer processing — a factory run by a finely tuned "silicon machine." The route to this concept will require some rigorous and fundamental changes by those responsible for fab automation, however.

Today's wafer fab automation capabilities, particularly those associated with minienvironments, enable competitive upgrading of existing facilities. Indeed, in a number of cases, a minienvironment-based fab upgrade strategy has proven to be a low-risk means to improve the performance of an existing facility.

It seems apparent that the previous delay in 300mm plus the work of I300I and Selete have done a lot to ensure the existence of an adequate 300mm toolset, at least one that is better than previous industry transitions to larger wafers.

While SECS/GEM is the prevalent communication standard for semiconductor manufacturing equipment, it does not encompass recent developments in software engineering and networking.

Detailed attention to the design of resist processing nozzle rinsing action and improved airflow around the developer catch-cup chamber, combined with physical process-parameter optimization, has achieved a significant reduction in defects during resist processing and wider process latitude.

An investigation was conducted to determine the source of a yield-limiting defect identified on all product types at a wafer fab. The defect was isolated to patterning operations in the frontend section of the device process where a conventional multistep sequence was used.