Issue



Table of Contents

Solid State Technology

Year 2001
Issue 4

DEPARTMENTS

Editorial


Exploring the uncharted world of the future Net

Most of us have already uncovered some of the values of the Internet, for such things as travel, exchanging ideas and information, following the stock market, and, of course, for getting and exchanging information within our own industry.


World News


World News

Semiconductor sales hit record $204 billion in 2000; Industry downturn prompts layoffs ...


Tech News


Technology News

Spooky quantum physical force harnessed for MEMS; Innovations needed for Cu/low-k integration ...


Asiafocus


The view from Japan: Chipmakers giving up on doing it all themselves*

Semiconductor makers are starting to question the value of their production divisions. They can't overwhelm the competition with their own in-house technology alone, and they face a worsening shortage of engineering talent.


Market Watch


Advanced IC packaging: Markets and trends

As applications for ICs continue to proliferate at an astonishing rate, the number of IC packages needed to support their varied requirements also proliferates.


New Products


New Products

DUV step-and-scan system; Transparent film metrology; SOI wafer inspection; Substrate mapper; Overlay metrology tool ...


Calendar


Calendar

A listing of industry events from April to November 2001.


People


People

Transmeta Corp, Santa Clara, CA, has named Mark Allen CEO. Former CEO and company co-founder David Ditzel will become vice chairman and CTO. Allen was formerly president and COO of Transmeta, and will retain the title of president. ...


New Literature


New Literature

Hydrogen peroxide brochure; Vacuum and flow brochure ...


FEATURES

Cmp


Navigating yield through the maze of copper CMP defects

Many types of defects arise from the copper CMP step, and careful inspection and an understanding of the failure mechanisms allow processes to be modified to reduce the defect levels.


Thermal Processing


Solutions for the 100nm node with ultrathin silicon nitride gates

To continue the scaling trend of CMOS technology, the anticipated high gate leakage current in ultrathin gate dielectrics must be suppressed. In addition, dielectrics must also suppress boron diffusion and act as a barrier.


Industry Insights


Let's get on with using the Internet on the fab floor

The semiconductor industry has been slow to overcome convention and embrace the Internet as a medium to enhance both supply and support, even though the semi sector continues to provide components supporting almost every other medium- and high-tech industry in the world.


Cover Article


Process and environmental benefits with solvent-free stripping

Photoresist removal following dry etching or high-dose ion implantation conventionally employs solvents and acids, sometimes preceded by a dry oxygen-based plasma ash.


Packaging Assembly


Electrochemically deposited solder bumps for wafer-level packaging

The semiconductor industry is adopting wafer-level packaging as it continues to be driven by economic and advanced technology issues. State-of-the-art packaging requires the ability to deposit fine pitch solder bumps with excellent process control.


Materials


Evaluating plasma-etch resistance of high-performance plastics

Plasma etch is used throughout wafer processing, including initial oxide etch, various pre-cleaning steps, etching in various reactive chemistries, and removal of specific layers at several steps in the process.


EUROPEAN-TECHNOLOGY

Eurofocus


It's Europe's turn now

After a down period in 1997/1998, the semiconductor industry is flourishing. Worldwide semiconductor consumption is projected to grow solidly in 2001, and next year looks bright as well.


Metrology


Analysis of a 200/300mm vertical furnace with integrated metrology

Recently, very compact metrology units with excellent performance have become available, enabling integration of metrology equipment and processing equipment, such as furnaces.


Lithography


248nm and 193nm lithography for damascene patterning

A bi-layer 248nm photoresist system has clear advantages for dual damascene processes, particularly for solving planarization and dry etch resistance issues, without giving up lithographic performance.


Packaging Assembly


Chip singulation process with a water jet-guided laser

A novel method for dicing wafers with a laser beam guided by total internal reflection in a water jet is described. A significant benefit is the reduction of chipping and imperfections at the edge of the singulated chips.