Lithography

LITHOGRAPHY ARTICLES



Litho forum poll: We want 193nm immersion ready for 45nm

05/26/2006  May 26, 2006 - Attendees at the SEMATECH-sponsored Litho Forum in Vancouver, BC, May 22-24 discussed the readiness of lithography technologies for the 32nm half-pitch and beyond technology generations, seen beginning in 2012, following the 45nm node generation expected to begin production in 2009.

SEMATECH, Queensland U. working on high-index immersion photoresists

05/25/2006  May 25, 2006 - SEMATECH and the U. of Queensland, Brisbane, Australia, have agreed to codevelop new resists for 193nm immersion lithography, in an effort to extend immersion technology for multiple generations.

Toward an open ecosystem for R&D

05/25/2006  During a ConFab panel discussion on "Solutions to the R&D Challenge," Simon Yang, senior VP and CTO of Chartered Semiconductor Manufacturing, called for greater support of an industry-wide "open ecosystem of R&D" to deal with the impending R&D crisis. Several factors are converging to create a perfect storm in R&D, he said -- as scaling approaches physical limits, profit margins for technology and manufacturing companies are shrinking, and R&D operation costs are escalating out of control.

Can lessons from 300mm conversion keep the industry on the productivity roadmap?

05/24/2006  A detailed economic model suggests that industry productivity will lag historical trends early in the next decade, slowing the decline in cost/transistor, unless new initiatives get underway to reverse this trend, reported Scott Kramer, director, International SEMATECH Manufacturing Initiative (ISMI), in a Tuesday afternoon presentation at The ConFab.

Litho costs won't limit Moore's Law, but technology is the key

05/24/2006  Examining the history of lithography over the past two decades suggests that the choices ahead are similar to those that were successfully made in the past, suggested Kazuo Ushida, Nikon Corp., in his presentation on "Cost-effective lithography" at The ConFab. Comparing the array of future litho contenders in 2006 with the options considered in 1999, Ushida concluded that it looks like "deja vu all over again."

Innovation needed to tap huge potential markets

05/23/2006  Enormous potential markets are emerging for semiconductors, said Jai Hakhu, corporate VP, Intel, at The ConFab. However, serving them will require continued innovation, and an intense focus on efficiency by the industry. Chips will have to provide multiple functions at lower price points to capitalize on the opportunities, he stated.

Pushing "Moore" out of lithography

05/23/2006  Peter Jenkins, VP of marketing for ASML, described lithography options and challenges at the 32nm half-pitch for ConFab attendees. Among the challenges: there is no clear consensus on the part of IC manufacturers with respect to the kind of lithography needed at 32nm, although EUV is preferred for 22nm half-pitch.

Economics of sub-45nm chipmaking for equipment suppliers

05/23/2006  Tough challenges facing process tool vendors as the industry moves toward sub-45nm chip features will require imaginative solutions. An analysis relating important application trends to process tool requirements was presented by Masayuki Tomoyasu, director of development and planning for Tokyo Electron, Ltd. (TEL), who then proposed a wide range of potential solutions for toolmakers.

ASML: Immersion ramp pushing tool demand in 2Q

05/23/2006  May 23, 2006 - ASML Holding NV says it's seeing stronger than anticipated demand for its lithography equipment in 2Q06, as customers place orders for immersion lithography tools used in an anticipated production ramp-up in 4Q06-1Q07.

Toppan Photomasks revolves CEO spot

05/22/2006  May 22, 2006 - Marshall Turner, president and CEO of Toppan Photomasks Inc., has stepped down after three years at the helm, leaving to return to his venture investment business. Ltd. David Murray, currently EVP of worldwide operations, will succeed Turner, and take his spot on the company's board of directors.

IBM's Meyerson: "Scaling is dead," long live collaborative innovation

05/22/2006  The semiconductor industry needs to usher in a new era of "collaborative innovation" to push beyond the limits of classical scaling and achieve new advances in information technology price performance. That idea, proposed by The ConFab opening keynote speaker Bernard Meyerson, IBM fellow, VP strategic alliances, and chief technologist at IBM's Systems and Technology Group, set the tone for three days of top-level executive discussions on a range of issues facing chipmakers and suppliers alike.

ASMI lays out business case for shareholders

05/19/2006  May 19, 2006 - At its annual meeting of shareholders, ASM International NV presented a "roadmap" for its corporate strategy going forward, and proclaimed it will achieve profitability in its maligned frontend equipment business in 2007.

ATDF, U-Texas open nano R&D center

05/17/2006  May 17, 2006 - SEMATECH's R&D fab subsidiary Advanced Technology Development Facility (ATDF) and the U. of Texas-Austin have formed an Advanced Processing and Prototyping Center (AP2C), a specialized R&D program to develop leading-edge nanotechnology for use in semiconductor manufacturing.

TSMC lays out 65nm DFM plan

05/17/2006  May 17, 2006 - Taiwan Semiconductor Manufacturing Co. (TSMC) has unveiled a 65nm design-for-manufacturing compliance "ecosystem" to channel DFM capabilities through selected EDA tools to TSMC's manufacturing data format.

Japan electronics manufacturer selects FEI System for in-fab root cause analysis

05/16/2006  May 11, 2006 -- /PRNewswire-FirstCall/ -- HILLSBORO, Ore. -- FEI Company (NASDAQ:FEIC) today announced that a global Japanese electronics manufacturer has selected FEI's DA 300 in-fab defect analyzer for its factory.

SPIL Picks SUSS Lithography Systems to Boost Solder Bumping

05/09/2006  Munich, Germany — SUSS MicroTec obtained orders for lithography systems and coat/bake/develop tracks from Siliconware Precision Industries (SPIL), including two MA200e full-field lithography systems and multiple production coating clusters for processing 200- and 300-mm wafers, in support of SPIL's solder bumping capacity expansion. The orders were signed in January and April 2006, and represent additional follow-on business from SPIL.

Photronics, Micron kick off photomask JV

05/08/2006  May 8, 2006 - Photronics Inc., Brookfield, CT, and Micron Technology Inc., Boise, ID, have officially formed a joint venture to develop and produce photomasks based on internal efforts to support 45nm chipmaking processes.

China Poised to Be Largest IC Consumer by 2010

05/08/2006  Scottsdale, AZ — China is emerging as the epicenter for semiconductor manufacturing and consumption, according to a report by In-Stat, a high-tech market research firm. In 2004, China utilized about 20% of total global semiconductor products — by 2010, In-Stat forecasts one-third consumption, making it the world's largest semiconductor consumer.

April 2006 Exclusive Feature: LITHOGRAPHY

Processing and characterization of a positive thick photoresist



05/05/2006  By Shang-Chou Chang, Shen Chi Hsieh, Kun Shan U., Taiwan; Tsung Chieh Cheng , Bau Tong Dai, National Nano Device Laboratories, Taiwan

OVERVIEW There is increasing interest in the thick, positive, epoxy-based photoresist made of the material AZ P4620 because of its wide applications in micro-fluidic devices and micro-electromechanical systems (MEMS). The optimization of polymerization for this material under near ultraviolet (UV) lithography...




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