Lithography

LITHOGRAPHY ARTICLES



STEAG HamaTech expands US activities

06/07/2005  June 7, 2005 - STEAG HamaTech USA Inc., a wholly owned subsidiary of STEAG HamaTech, Sternenfels, Germany, will be expanding its presence in Austin, TX, with an initiative to strengthen US infrastructure capabilities for installed base customer support for photomask process equipment, as well as product development for niche wafer applications.

Single-wafer, mixed-fluid cleaning proposed for advanced processes

06/01/2005  AUSTIN, Texas-The need for and difficulty of removing surface particles without damaging circuit features, and the increasing trend of mask cleaning borrowing from wafer-cleaning technologies, were key themes that emerged from the seventh annual conference on surface preparation cleaning "Emerging Technologies in Semiconductor Surface Preparation," sponsored by SEMATECH(www.sematech.org).

Order round-up: Akrion, Mattson, Synopsys, Ultratech

05/25/2005  May 25, 2005 - A round-up of recent industry activity shows new orders for Akrion, Mattson Technology, Synopsys, and Ultratech products.

Winbond awards contract to ASML

05/18/2005  May 18, 2005 - ASML Holding NV (ASML) today announced it was awarded a customer contract from Winbond Electronics Corp. to equip its 300mm fab in Taiwan. No financial details are being disclosed. ASML will install systems from its TWINSCAN platform starting next month.

Gold-bumping Capacity Demand Stems from FPD Production Boost

05/18/2005  (May 18, 2005) San Jose, Calif. — Rising flat-panel display (FPD) production is boosting capacity expansion for gold-bump lithography processing used in advanced packaging in Asia, according to Ultratech Inc., having received multiple-system orders from several customers in Taiwan and China for advanced packaging lithography systems.

SEMATECH elevates planar transistor scaling to extend use of conventional CMOS devices

05/17/2005  Can SEMATECH Inc. help find new ways to squeeze more life out of conventional planar bulk transistors while delaying the need for nonclassical CMOS devices, such as FinFETs or other multigate FETs? That's the newest objective being added to SEMATECH's list of top 10 technical challenges for 2006, which will be used to formulate and focus about 75 R&D programs next year.

Photronics launches strategy to drive advanced photomask R&D

05/09/2005  May 9, 2005 - Photronics has announced its strategy to drive advanced photomask R&D through a network of global corporate R&D centers. Photronics said its photomask R&D center in Austin, TX, and the recently launched Photronics-PKL R&D center in Cheon-an, Choong-nam, Korea, are working to develop next generation fabrication processes to manufacture high performance IC products down through the 45nm node.

May 2005 Exclusive Feature: SPIE 2005

Immersion lithography's next wave of tools targets 'hyper-NA' and high 300mm throughput



04/29/2005  By J. Robert Lineback, M. David Levenson, Senior Editors, Solid State Technology magazine

With no 'showstoppers' identified yet in immersion lithography, rival scanner makers ASML, Canon, and Nikon are accelerating efforts to take 193nm 'wet' exposure tools to the next level, quickly pushing NA lenses to their feasible limits in systems using water to boost DOF and resolution for 65nm and 45nm processes.

Toppan completes acquisition of DuPont Photomasks

04/25/2005  April 25, 2005 - Toppan Printing Co. Ltd. has announced the successful completion of the acquisition of DuPont Photomasks Inc. Under the terms of the definitive agreement previously announced on Oct. 5, 2004, DuPont Photomasks shareholders will receive US$27 in cash/share. The equity value of the transaction is approximately US$650 million (approximately 68 billion yen) on a diluted basis. The acquisition was approved by shareholders of DuPont Photomasks on March 28, 2005.

New Polymers for Nanotechnology Applications in Development

04/25/2005  (April 25, 2005) San Sebastián, Spain — The CIDETEC (Centre for Electrochemical Technologies) Technological Centre is investing in nanotechnology development by participating in the European NAPA (Emerging Nanopatterning Methods) project. This research institution is directing a working subgroup to develop new thermoplastic polymers for applications in nanopatterning and nanolithography.

SEMATECH Pinpoints 2006's Biggest Technical Challenges

04/21/2005  (April 21, 2005) Austin, Texas — SEMATECH announces and identifies its Top Technical Challenges for 2006, continuing to underscore advanced gate stack, 193-nm immersion and EUV lithography, mask infrastructure, and low-k dielectrics with process compatibility. For the first time, consortium leaders also placed planar bulk transistor scaling on the list.

SEMATECH identifies top technical challenges for 2006

04/20/2005  AUSTIN, TX -- (MARKET WIRE) -- 04/19/2005 -- SEMATECH announced its Top Technical Challenges for 2006, continuing to underscore advanced gate stack, 193 nm immersion and EUV lithography, mask infrastructure, and low-k dielectrics with process compatibility. Consortium leaders also placed planar bulk transistor scaling on the list for the first time.

Sematech identifies top technical challenges for 2006; adds transistor scaling

04/19/2005  April 19, 2005 - Sematech has announced its top technical challenges for 2006, continuing to underscore advanced gate stack, 193nm immersion and EUV lithography, mask infrastructure, and low-k dielectrics with process compatibility. Consortium leaders also placed planar bulk transistor scaling on the list for the first time.

SPIE REPORT: Will market demand catch up to fast immersion developments?

04/18/2005  TSMC preps 193nm immersion 'risk' production; others still see no technical showstoppers

By J. Robert Lineback

The first wave of production-worthy 193nm immersion scanners now appears to be a shoo-in for at least part of the 65nm process generation and probably the entire 45nm node at decade's end, but industry managers and researchers speaking at the annual SPIE International Symposium on Microlithography attempted to rein in some of the unbridled enthusiasm with...

Mega merger creates new landscape for critical materials transport technology

04/01/2005  EAST HILLS, N.Y.-On the heels of a recent market study indicating that Asia is driving-and will continue to drive over the next several years-the cleanrooms hardware and garment market, filtration/purification developer Pall Corp. (www.pall.com) has opened a new manufacturing facility in Beijing, China, and has named Jon Weiner the first president of Pall Microelectronics Asia.

The tools we use

04/01/2005  People concerned with contamination control certainly know a lot about such things as cleanrooms, barrier isolators, minienvironments, fume hoods and glove boxes.




WEBCASTS



Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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