07/22/2008  There is a lot that can still be done to improve the efficiency of today's 300mm factories, and an early move to 450mm would only carry those inefficiencies forward another generation. That was the main message in an interview with Gerald Goff, principle member of technical staff for Advanced Micro Devices (AMD) in Austin, TX, during last week's SEMICON West.

07/18/2008  The content of Sokudo's annual lithography breakfast at SEMICON West on Wednesday was very similar to what one could have heard at SPIE back in February, but it was helpful to hear it again, focused on the 32nm node. There were no surprises, which was good news; a central theme was a review of double patterning methods, including Applied's spacer method.

07/17/2008  Gigaphoton sat down with SST to discuss the company's penetration into the US market -- the home turf for its primary competitor -- and offer an update on its EUV product progress.

07/17/2008  In an interview at SEMICON West, Mark Melliar-Smith, CEO of Molecular Imprints described two paths for his company: one toward insertion into the semiconductor industry in 2009, and another toward producing a billion disks a year with 20nm features for the hard disk drive industry in 2010.

07/16/2008  Rave's just-announced Rhazer tool offers a new scheme to deal with haze that builds up on reticles, and do it directly in a fab at a lower cost -- making it "the first real solution" to the problem of mask haze," according to one prominent industry expert.

07/14/2008  IMEC/ASML's newly 32nm SRAM, partially built with EUV lithography, offers a possible contrast to how Intel is working with the litho technology.

07/14/2008  IMEC and ASML give SST an inside scoop on their latest EUV milestone -- functional 32nm SRAM cells (FinFETs) -- and which technology is now under the gun to ensure a production tool is ready as advertised by the end of 2009.

07/10/2008  Gartner has lowered its capex forecast yet again amid a bursting memory industry bubble, global economic uncertainties, and "little upside potential currently visible for the near term."

07/04/2008  New technologies are needed to keep the semiconductor industry on track with Moore's Law. Step and Flash Imprint Lithography (S-FIL) has gained traction in recent years among several leading memory manufacturers.

07/01/2008  Overall agreement at this year's VLSI Symposium (June 16-19, Waikiki, Hawaii) was that planar CMOS is extendable to 22nm node but unlikely beyond that. By the 16nm node SRAMs will need FinFETs or a trigate-like design, which can be fabricated in bulk wafers rather than SOI wafers, as first reported by Toshiba in 2006 and now many others.

06/26/2008  June 26, 2008 -- Cambridge NanoTech, a supplier of Atomic Layer Deposition (ALD) systems for research and industry, announced the shipment of its 100th ALD System to the Tata Institute of Fundamental Research (TIFR) in Mumbai, India.

06/25/2008  June 25, 2008 - Toppan Printing and IBM have forged a new development agreement extending their photomask process development work to the 22nm node, continuing a longstanding partnership -- but an industry insider tells WaferNEWS that there's a strategic agenda at work that could shake up the market.

06/24/2008  by Debra Vogler, Senior Technology Editor, Solid State Technology
June 24, 2008 - Dow Corning Electronics aims to support development efforts toward high-volume manufacturing using e-beam lithography technology with its new XR-1541 spin-on resists, which it says are capable of defining features as small as 6nm.

06/20/2008  June 19, 2008 - Researchers at Kobe U. and Yumex have prototyped a UV light source made without mercury and twice as efficient as existing mercury lamps, with a commercial product possibly ready in two years, according to the Nikkei Business Daily.

06/20/2008  June 19, 2008 - Toppan Printing and IBM have forged a new development agreement covering the final phase of 32nm photomask process development, and all phases of 22nm photomask process development. Work will start this month at IBM's photomask facility in Essex Junction, VT.

06/17/2008  June 17, 2008 - At this week's VLSI Symposium (July 17-20, Hawaii), IMEC says its researchers say they have improved performance in planar CMOS using hafnium-based high-k dielectrics and tantalum-based metal gates for the 32nm node, reduced inverter delay by 33% (15ps to 10ps) and simplified the HK+MG process from 15 steps to nine.

06/17/2008  One of the papers being presented by Intel at this week's VLSI Symposium describes fabrication of the smallest reported floating body cell planar devices, seen as a potential replacement for standard transistor cache memory. Functional devices have been made measuring down to 30nm gate lengths, with a possible introduction at the 16nm node.

06/13/2008  by Ed Korczynski, Senior Technical Editor, Solid State Technology
The next 10 years will witness more changes in mainstream IC manufacturing technology than in the last 40 years combined. With rapidly escalating costs projected for ≤32nm-node digital CMOS manufacturing, IC companies are turning to analog, packaging, and heterogeneous integration to add greater value for lower cost and risk. In short: unique process integration challenges at each fab will drive everything.

06/13/2008  June 13, 2008 -- OAI, a manufacturer of UV exposure equipment for semiconductor, microfluidics, and nanotechnology, has won the bid from Trinity College, in Ireland, for its Nano Imprint Module, which will be integrated with OAI's Model 800 optical front and backside mask aligner. Trinity College purchased the Nano Imprint Module for both its R & D and teaching facilities.

06/13/2008  June 12, 2008 - Toppan Printing Co. Ltd. says it has developed the first 32nm-generation photomask manufacturing process, for 193nm immersion (water) lithography, targeting volume production by June of this year. But how did the company overcome known problems with double patterning? And how compatible is it with non water-based immersion?