02/27/2008  Feb. 27, 2008 - SEMATECH has purchased Molecular Imprints new Imprio 300 tool to demonstrate the feasibility of nanoimprint lithography for 32nm and below semiconductor production. Initial work will focus on demonstrating and enhancing overlay performance, and identify development areas to accelerate the introduction of the technology into manufacturing. Delivery is scheduled for mid-2008.

02/27/2008  Feb. 27, 2008 - Presenting at the SPIE Advanced Lithography Symposium, Philips Extreme UV and XTREME Technologies offered proof-of-principle experiment results showing their gas-discharge plasma source can be scaled to 100kHz operation frequency, which translates to a record 500W EUV source power -- more than enough to meet requirements for high-volume semiconductor manufacturing.

02/27/2008  by Bob Haavind, Editorial Director, and James Montgomery, News Editor, Solid State Technology
Feb. 27, 2008 - AMD and IBM say they have produced a working 22mm x 33mm test chip built with 45nm process technologies using EUV lithography for the first critical layer of metal interconnects, pushing beyond previous EUV efforts that involved "narrow field" portions of the design.

02/26/2008  by Bob Haavind, Editorial Director, Solid State Technology
Feb. 26, 2008 - Plenary talks at this week's SPIE Advanced Lithography Conference reviewed the road ahead for lithography, from how far 193nm immersion can be pushed (probably 32nm, helped double patterning, new lens materials/fluids, and 3D) to the projected readiness of an EUV infrastructure (maybe by 2010-2012), and the progress and stalls in ongoing work to achieve success in both areas.

02/26/2008  by M. David Levenson, Editor-in-Chief, Microlithography World
Feb. 26, 2008 - Have you ever wished that computational lithography could be more like a videogame? Gauda, a Sunnyvale, CA, startup decloaking at this week's SPIE's Advanced Lithography Symposium is offering to make it so, at least for optical proximity correction and verification (OPC and OPV).

02/26/2008  Feb. 26, 2008 - Carl Zeiss and SEMATECH say they have completed final design for a next-generation photomask registration and overlay metrology system, dubbed "Prove," that will enable production of advanced photomasks "with substantially improved image placement accuracy," eyeing in particular the tighter placement control required for double-patterning technology.

02/26/2008  Feb. 26, 2008 - The war between two rival international lithography source providers has reached US shores. Gigaphoton says it is expanding its presence in the US with a new subsidiary in Beaverton, OR, following recent customer wins in the US region that represents one-fifth of the worldwide market.

02/26/2008  Feb. 26, 2008 - HamaTech says its advanced modular processing platform, MaskTrack, has achieved "all critical SEMATECH roadmap milestones" for cleaning EUV mask blanks, with demonstrated successful removal of all particles at 30nm and greater, as well as "a number of" 10nm defects, seen as necessary for 22nm semiconductor manufacturing processes.

02/25/2008  by James Montgomery, News Editor, Solid State Technology
Feb. 25, 2008 - Dow Corning exec Jeff Bremmer talks with WaferNEWS about how his company has turned to a new business model, development partnerships with litho materials suppliers, for its push into the world of photoresist resins.

02/25/2008  by M. David Levenson, Editor-in-Chief, Microlithography World
Feb. 25, 2008 - Molecular Imprints CEO Mark Melliar-Smith tells WaferNEWS why its Imprio 300 imprint lithography tool is the "only game in town" for semiconductor prototyping and process development in the <30nm realm, capable of printing 32nm, 28nm and 22nm features at 4WPH with 35nm overlay.

02/25/2008  by Debra Vogler, Senior Technical Editor, Solid State Technology
Feb. 25, 2008 - At the opening of this week's SPIE Advanced Lithography Symposium, Brion Technologies unveiled a more powerful version of its Tachyon Computational Lithography platform, and the release of Tachyon DPT, software that allows chipmakers to meet the low k₁ requirements for memory and logic devices at 32nm and below.

02/20/2008  Feb. 20, 2008 - Nikon Corp. says it will have an "enhanced" version of its NSR-S610C ArF immersion scanner, optimized for double-patterning lithography process, ready for customers by 4Q08, billing the upgrade as a "low-risk solution" for developing double-patterning technology for use at the 32nm node.

02/15/2008  by M. David Levenson, Editor-In-Chief, Microlithography World
Feb. 15, 2008 - An odd thing happened on the way to 65nm chip technology -- perfectly good photomasks started going bad after a few hundred wafer exposures, due to the deposition of crystal-like defects. If detected, they can be cleaned off and the $100k mask re-used. KLA-Tencor says its new suite of tools can requalify masks in the fab, avoiding yield crashes (though occasionally delaying production).

02/15/2008  Feb. 15, 2008 - KLA-Tencor has unveiled three new inspection tools for requalifying masks in a wafer fab and inspect for contaminants, capabilities it says will improve yield and lower production risk in 65nm and 45nm chip manufacturing and 32nm development.

02/12/2008  Feb. 11, 2008 - SEMATECH says it has demonstrated defect density of 0.04/cm² for EUV mask blanks, with a total of 8 defects combined from substrate and multilayer, surpassing the consortium's published commercial EUV mask blank roadmap target for the end of 2007.

02/08/2008  EV Group, a supplier of wafer-bonding and lithography equipment, has received an order from the Indian Institute of Technology (IIT), Bombay, for two of its MEMS-focused systems.

02/07/2008  Feb. 7, 2008 - SanDisk says it will start shipping 16Gb multilevel NAND flash memory products built with 43nm process technologies during 2Q08, with 32Gb versions slated for later in the year. Manufacturing of the newer process node is underway at Toshiba's Yokkaichi operations near Nagoya, Japan, produced initially at Fab 4, followed by Fab 3 sometime in 2H08.

02/06/2008  Agilent has sold a model 5500 atomic force microscope to the University of Northern Iowa electrical characterization and materials science studies.

02/05/2008  Feb. 5, 2008 - At this week's International Solid-State Circuits Conference (ISSCC), Texas Instruments is disclosing process and design information about its 45nm process-based 3.5G baseband and multimedia processor, which offers 55% better performance and uses 63% less power than the 65nm version.

02/05/2008  By Roy White, RAVE LLC, Delray Beach, FL USA

Photomask costs are a painfully visible issue in today's competitive semiconductor market. This puts substantial pressure on the profitability of photomask makers. Since the "mask makers' vacation" ended some 15 years ago, it seems every paper you read has another exorbitant estimate of future mask costs.