10/23/2007  October 23, 2007 - Samsung Electronics Co. Ltd. says it has developed 64Gb multilevel cell NAND flash memory chip using 30nm process technology, built using double-patterning lithography, with commercial chips ready in about a year.

10/18/2007  October 18, 2007 - At its annual award banquet, SEMI has named winners of two awards: UT-Austin's C. Grant Willson, for his work in chemically amplified resists; and IBM's Bernie Meyerson for a lifetime of technical innovation.

10/16/2007  October 16, 2007 - IMEC has tipped initial results of alpha-demo work on extreme ultraviolet (EUV) lithography work which it says produced the first high-resolution images, and has agreed to push ahead with plans to add a "preproduction" tool from partner ASML in its 300mm facility in time for the 22nm node in 2010.

10/16/2007  Attendees at last week's International Symposium on Immersion Lithography in Keystone, CO, heard that three types of 193nm water immersion exposure tools are being used for 55nm/~50nm/<50nm mass production, with solutions for the few remaining difficulties at hand, and machines achieving the maximum resolution possible with water are being delivered in time for the 45nm node. However, the course beyond 45nm seems murky, and decisions must be made soon about deploying high-index technology.

10/16/2007  E-Shuttle, the joint venture of Fujitsu Ltd. and Advantest Corp., aims to bring down ASIC development costs by using e-beam direct write instead of masks for some critical layers in its prototyping service for 65nm chips starting this month, company president Haruo Tsuchikawa tells SST partner Nikkei Microdevices.

10/16/2007  In what it claims is validation for imprint lithography for 22nm CMOS, Molecular Imprints Inc. (MII) is touting results from Toshiba, reported at the 33^rd International Conference on Micro-and Nano-Engineering (MNE, Copenhagen, Denmark, Sept. 23-26), which show defect levels "very similar" to those seen in the early days of immersion lithography.

10/11/2007  Research presented by IMEC at the SEMATECH Immersion Workshop in Colorado shows patterning of through-pitch contact layers without assist features using combined illumination sources and two ASML immersion scanners.

10/11/2007  ; EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology, and semiconductor markets, announced the installation of its fourth IQ Aligner System for packaging applications at a major semiconductor manufacturing facility in Austria. This purchase reportedly strengthens the customer's capacity for wafer-level packaging of MEMS and display devices.

10/09/2007  WaferNEWS talks with Oxford Instruments about why it's following the money with its inductively coupled plasma tool into nanoimprint lithography applications, to fill NIL's particularly critical needs in stamp etch, descum, and etching of the polymer mask.

10/08/2007  Double patterning technology seemed to be the consensus choice for the next half-pitch node or two for the maskmakers convened in Monterey for SPIE's annual BACUS Symposium on Photomask Technology (Sept. 16-21) -- not that anyone thinks it will be easy. The evident delay in EUV technology poses special challenges for the photomask community, highlighted in a special Friday session subtitled: "Twice the pain for twice the gain."

10/02/2007  By Stephen Ormrod, Edwards, West Sussex, United Kingdom EXECUTIVE OVERVIEW Vacuum technology is not often considered as leading semiconductor manufacturing. However, a look back at the last 50 years reveals that it has played an essential supporting role. Complex interactions between vacuum and manufacturing technologies have inspired

10/02/2007  This year's BACUS meeting was all about the 32nm node, and with EUV and nanoimprint still not ready, it's clear that the industry will use today's immersion processes plus double patterning lithography. Discussions involved how to get the needed incremental improvements in image placement errors and CD uniformity, and ongoing progress in mask blanks, e-beam writers, resists, and inspection/repair tools. And two innovations that will help sustain the future pace of this industry were debuted.

10/02/2007  Rick Wallace, CEO of KLA-Tencor, launched BACUS 2007 with his keynote speech highlighting the technical and business challenges facing mask toolmakers. An early leader in mask inspection equipment, KLA-Tencor at first relied on technical innovation, he noted. In its middle years, 24 x 7 production reliability was the top priority. Now a new business model is needed: collaboration with key customers and supplier.

10/02/2007  The photomask industry is puttering along as usual, with mask revenues as a percentage of the global semiconductor industry remaining steady, as are the number of plates shipped, according to the annual self-assessment survey presented by Gil Sheldon at the SPIE Symposium on Photomask Technology (Sept. 18). Almost all of the papers presented at this year's BACUS dealt with refinements of technology supporting optical lithography, with EUV and imprint notably under-represented.

09/25/2007  The growing role that solid-state drives, which use NAND flash memory to store digital data, are playing in the storage market, was the subject of much discussion at the IDEMA DISKCON 2007 conference (9/19-20). Samsung, for one, is upbeat for new applications as costs decline and densities soar, and has big plans to cut costs further. However, the fact is that disk drives are still the storage technology of choice -- and the rise of consumer demand is actually helping HDDs as much as flash.

09/21/2007  Analysts presenting at a SEMI breakfast panel on Sept. 19 reviewed changes reshaping the chipmaking and equipment industries, agreeing on several fronts such as progress in production efficiencies and an increasingly consumer-reliant future. But there was plenty of room for debate about the real growth possible in certain new markets (e.g. photovoltaics), and what the sum of all these parts means for investors.

09/20/2007  Oxford Instruments and NIL Technology have collaborated to develop etch processes for nanoimprint lithography (NIL), a high-throughput method for fabricating structures as small as 10 nm.

09/18/2007  September 18, 2007 - Toppan Photomasks Inc. has joined a consortium led by European research lab CEA-Leti to jointly develop double patterning techniques, seen as a way to extend 193nm lithography to the 32nm and offer an eventual bridge to EUV whenever it enters semiconductor manufacturing (likely after 2013).

09/18/2007  September 18, 2007 - Nikon Corp. and Synopsys Inc. have delivered what they say is a "manufacturing-aware" system for 45nm and below chipmaking by combining info gleaned from Nikon scanners with Synopsys' Proteus software, to develop sub-45nm litho models.

09/18/2007  Brion Technologies, the computational lithography wing of lithography toolmaker ASML, says its Tachyon system will now do the mask transformations needed for dual dipole lithography, to permit chip designs to approach more closely to the limit of single resist exposure technology. Also, to enhance the process window for repetitive structures in memory, Brion's LithoCruiser can now co-optimize the diffractive optical element needed for custom illumination along with the mask pattern.