Lithography

LITHOGRAPHY ARTICLES



Integration extends 193nm litho

03/27/2007  As thoroughly reported by WaferNEWS, SST, and Microlithography World, the 2007 SPIE lithography meeting detailed that 193nm wavelength lithographic reduction steppers may be the last mainstream lithographic technology for the semiconductor manufacturing industry. We must now look for ways to create ever smaller device features using 193nm litho with clever combinations of other known unit-process steps: thin-film depositions, etches, and plasma surface treatments.

Joint MLW/SST April 2007 Exclusive Feature:
Contact hole lithography for 65nm logic


03/20/2007  By Yuji Setta, Tatsuo Chijimatsu, Satoru Asai, Fujitsu Ltd., Tokyo, Japan

Arrays of 100nm contact holes can be printed with adequate depth of focus (DOF) through pitch using dry 193nm wavelength exposure and a special illuminator design.

Contact holes are among the most difficult IC structures to pattern. The design rule for nested holes patterns at the 65nm-node generation assumes a spacing almost the same as the wavelength used in ArF lithography.

Equipment galore at SPIE 2007

03/19/2007  by M. David Levenson, Editor-in-Chief, Microlithography World

The traditional Exposure Systems and Components session on the last day of the SPIE Advanced Lithography Symposium gave vendors the opportunity to tout their latest hyper-NA immersion scanners and supporting technologies.

Report from SPIE: Optics lives, but for how long?

03/19/2007  By Griff Resor, Resor Associates

Each year, experts gather at the SPIE Advanced Lithography Symposium in San Jose to report on their pursuit of Moore's Law. Every two years, a new node in the ITRS is reached, and 2007 is the year for 45nm technology production. Many presentations at SPIE showed the 45nm node in production, as scheduled, using 193 immersion lithography, while other presentations looked further ahead...

Ramtron claims industry first with 4Mb nonvolatile FRAM chip

03/14/2007  Ramtron boasts the highest density FRAM device available with the launch of its FM22L16. Based on a 130 nm CMOS manufacturing process, it promises quadruple the capacity of previous memory chips.

NanoIdent opens first fab for printed semiconductor-based optoelectronic sensors

03/13/2007  March 13, 2007 - NanoIdent Technologies AG, which prints semiconductor-based optoelectronic sensors, has reportedly opened the world's first manufacturing facility for the delivery of printed semiconductor-based optoelectronics.

Blaze DFM closes $10M Series B funding

03/13/2007  March 13, 2007 - Blaze DFM, an electrical design for manufacturing (DFM) company, has closed its Series B round of funding for $10 million.

TECH TALK
Topcoat trends at SPIE 2007


03/12/2007  by M. David Levenson, Editor-in-Chief, Microlithography World

First-generation resist systems for immersion lithography employed a topcoat material to protect the resist and prevent leaching of resist components that might damage the optics. By making the topcoat surface hydrophobic and controllable, topcoat materials suppressed defects and facilitated rapid wafer scan.

SPIE 2007
Burn Lin's wish list for optical lithography: Eliminate the mask


03/12/2007  by Griff Resor, Resor Associates

March 13, 2007 - Kicking off the 20th annual Conference on Optical Microlithography last week during SPIE, TSMC's lithography guru Burn Lin wove a tale that began as a history lesson, but shifted to a modern message tackling today's top lithography challenges. The common thread throughout: "The devil is in the mask."

TI, Ramtron join forces on FRAM technology in 130nm process

03/12/2007  March 12, 2007 - Texas Instruments and Ramtron International Corp. have entered into a commercial manufacturing agreement for ferroelectric random access memory (FRAM) products. The agreement provides for the production of Ramtron's FRAM memory products on TI's advanced 130nm FRAM manufacturing process, including Ramtron's 4Mb FRAM memory.

Nanoimprint lithography presses into manufacturing markets

03/09/2007  The plenary speech at the SPIE's Advanced Lithography conference characterized nanoimprint lithography (NIL) as "unique . . . in that it is cheap enough, fast enough, and flexible enough that it can be used for things other than CMOS." Potential markets for NIL include sub-32-nm CMOS, post-CMOS devices, high-brightness LED, storage media, MEMS, flat panel displays, flexible electronics, and biomedical devices.

ASML completes acquisition of Brion Technologies

03/08/2007  March 8, 2007 - Litho systems supplier ASML Holding NV (ASML) today announced that it has completed its acquisition of Brion Technologies Inc., a provider of semiconductor design and wafer-manufacturing optimization products for advanced lithography.

REPORT FROM SPIE: Double double, toil and trouble!

03/06/2007  Progress in water immersion exposure technology since last year's SPIE Advanced Lithography Symposium has been so convincing that its insertion into manufacturing at the 55nm and 45nm generations (as reported by Toshiba, STMicro, and others) is not likely to be interrupted. However, the consensus today is that some evolutionary step has to be taken to extend immersion technology and keep up with Moore's law -- and double patterning technology seems to be the step that will take us to 32nm.

Modeling becomes key to advanced lithography

03/06/2007  The prominence of a dedicated joint session and a panel discussion on "computational lithography" at this year's SPIE Advanced Lithography Symposium -- not to mention ASML's recent $270M purchase of Brion Technologies -- illustrate the growing importance of resolution enhancement tricks that have made it possible to approach the 45nm node using an exposure wavelength four times larger. Making sure that those tricks actually work before fabricating complex masks has become crucial.

At SPIE, SEMATECH reviews success stories in preparing EUV for manufacturing

03/06/2007  February 28, 2007 -- /BUSINESS WIRE/ -- SAN JOSE, Calif. -- SEMATECH's program in developing solutions for extreme ultraviolet lithography (EUVL) infrastructure has brought the technology out of proof-of-feasibility and into the realm of identifying manufacturing challenges, participants at the annual SPIE Advanced Lithography conferences learned here yesterday.

Nova solicits $5M from investors

03/02/2007  March 2, 2007 - Israel metrology equipment provider Nova Measuring Instruments Ltd. says it has agreed to a $5 million private placement of nearly 2 million shares by a group of several investors.

Nikon touts shipment of 45nm immersion tool

02/28/2007  February 28, 2007 - Nikon Corp. says it has shipped its newest ArF immersion lithography scanner, the NSR-S610C, to an unnamed IC manufacturer for 45nm production work and 32nm development. The selection came after a "one-year, head-to-head evaluation," according to Kazuo Ushida, president of Nikon Precision Equipment Co.

SPIE keynotes dismiss EUV

02/27/2007  The organizing committee of SPIE Advanced Lithography Symposium -- the conference formerly known as "Microlithography" -- probably didn't plan for the Monday (Feb. 26) keynote addresses to dismiss EUV lithography, but that's exactly what happened. Prior to three days of detailed EUV presentations, executives presented perspectives that do not include place for this next-generation lithography technology any time in the near future.

Luminescent touts 45-32nm benefits of "ILT"

02/27/2007  February 27, 2007 - At this week's SPIE Advanced Lithography Symposium, Luminescent Technologies claims to have data showing customers using its inverse lithography technology (ILT) in 45nm and 32nm development efforts. The company is touting ILT as an alternative to optical proximity correction (OPC), offering better pattern fidelity and broader lithography process windows.

Nikon, CEA-Leti partner for 32nm double patterning/exposure

02/27/2007  February 27, 2007 - Nikon Corp. and European R&D microelectronics research center CEA-Leti say they have formed a joint development program to develop optical lithography technologies at the 32nm node, including double exposure and double patterning. Work will be performed at CEA-Leti's Nanotec 300 research facility, utilizing a Nikon scanner.




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