Semiconductors

SEMICONDUCTORS ARTICLES



450mm-TSV-EUV-transitions-SEMATECH-Armbrust

01/19/2011 

SEMATECH January 2011Dan Armbrust, SEMATECH, spoke about the role of collaboration in his SEMI Industry Strategy Symposium presentation. Significant technology transitions facing the semiconductor industry include lithography (introduction of EUV), interconnects (TSVs and 3D packaging), and productivity (450mm wafer manufacturing). Additionally, disruptive technology in logic and memory devices will challenge the industry.

Packaging, assembly changes coming in next ITRS Update

01/19/2011 

Dr. Phil Garrou looks ahead to a laundry list of changes coming in the next ITRS Update with respect to assembly and advanced packaging, including 3D integration, interposers, and applications from medical to automotive and embedded applications.

 

Advanced packaging collab Rudolph Technologies process tool supplier IC device manufacturer for defect inspection wafer debonding

01/18/2011 

The development effort involves the integration of defect inspection with a debonding tool. Manufacturing efficiencies, along with the ability to handle ultra-thin wafers, necessitates the integration of inspection in de-bonding applications. Rudolph is bringing its inspection technologies to this three-way collaboration to provide this integrated process control solution.

ITRS 2010: Taking on the energy challenge

01/18/2011 

For the first time, the newly updated International Technology Roadmap for Semiconductors (ITRS) overtly addresses energy consumption. Laura Peters looks at how the ITRS maps out the influence that devices can have on power consumption in various applications, and long-term goals for developing energy-efficient materials and devices.

STATS ChipPAC expands wafer level packaging WLP with 300mm line

01/18/2011 

STATS ChipPAC Ltd. (SGX-ST:STATSChP), semiconductor test and advanced packaging service provider, expanded its wafer level package (WLP) offering with new 300mm manufacturing capabilities in Taiwan.

Toppan, IBM focus 14nm photomask JV on ArF immersion lithography

01/17/2011 

Toppan Printing Co. Ltd. extended a joint development agreement with IBM for leading-edge photomask process, covering the 14nm technology node for logic devices. Toppan and IBM will focus their joint development efforts on ArF immersion lithography for the 14nm node.

Inside Intel's numbers: What the capex surge means

01/17/2011 

Historically countercyclical-investing Intel is up to its old tricks, pledging a massive record spending spree in 2011. We break down all the numbers and what they mean, from exec statements and Q&A comments to what key industry analysts think.

Chipscale packaging tech garners SEMI award

01/17/2011 

SEMI named Thomas DiStefano, John W. Smith Jr., and Michael Warner as recipients of the 2010 SEMI Award for North America for contributions to the development and commercialization of Micro Ball Grid Array (μBGA) technology.

ISS-keynoter-Mark-Durcan-on-leveraging-capital-in-M-A-DRAM-strategy

01/17/2011 

Mark Durcan, president & COO of Micron, gave the conference keynote address at SEMI’s Industry Strategy Symposium. Afterward, he shared his thoughts on M&A strategy, Micron’s positioning for the future, and enthusiasm for the memory business with Debra Vogler, senior technical editor.

DRAM-market-plunging-11.8-in-2011-says-iSuppli

01/14/2011 

Figure. Global dynamic random access memory (DRAM) revenue market forecast (Billions of U.S. Dollars). Source: iSuppli, January 2011With a huge drop in average selling prices (ASP) predicted for 2011, global dynamic random access memory (DRAM) revenue is expected to contract sharply this year, despite strong growth opportunities in smart phones and tablets, according to new IHS iSuppli research.

Below 22nm, spacers get unconventional

01/13/2011 

IEDM Spacer discussionSpacers are considered "conventional materials," and thus an odd topic for the cutting-edge IEDM. ASM CTO Ivo Raaijmakers points out that semiconductor fab below 22nm will require different processes for spacers: atomic layer deposition (ALD) and plasma-enhanced ALD (PEALD).

Heated vacuum-chuck increases control with thin substrate coating, says USI

01/13/2011 

Ultrasonic Systems, Inc. (USI) released a heated vacuum chuck option for the Prism spray coating system. The heated vacuum chuck option for Prism suits thin substrate, wafer, foil, and membrane coating applications, where it enhances control of the substrate.

ITRS 2010: What happened during this off-year?

01/12/2011 

The 2010 Update to the International Technology Roadmap for Semiconductors (ITRS), while not one of the scheduled major revisions, nevertheless includes substantial changes have occurred in 2010, including boosts in the timelines for NAND flash and DRAM device rollouts, backup plans for lithography forced by EUV delay, impending device and interconnect structural changes, and progress in 3D packaging.

ISS 2011: Forecasts and strategies, photonics as a data shovel

01/11/2011 

Industry and macroeconomic forecasts, Micron's strategy, manufacturing and technology challenges, smart phones and tablets, and some really big data transmission numbers to solve, headlined presentations on the first day of the 2011 Industry Strategy Symposium, reports Techcet's Michael A. Fury.

Tooling and process technology vital for thin packages

01/11/2011 

Getting thinner appears to be the goal driving the market in both the wafer-level and substrate-level sectors, and innovative tooling and process technology will become paramount in addressing thinned packaging and ramping up to volume reliably, writes Dave Foggie from DEK.

22nm brings maskmakers, end users closer

01/11/2011 

The conditions and challenges at the 22nm technology node are becoming clear: double patterning, source-mask optimization are becomign pervasive, EUV is on the doorstep, and they will all have significant impact on mask manufacturers, writes Franklin Kalk from Toppan Photomasks.

22nm: The era of wafer bonding

01/11/2011 

The migration to the 22nm node is about more than just scaling down, it's also about scaling up with thinner devices stacked into a single package -- and these require new manufacturing considerations with wafer bonding playing a central role, writes Bioh Kim from EV Group.

SUSS nano research collab with Cornell University

01/11/2011 

SUSS MicroTec announced a strategic collaboration with the Cornell NanoScale Science & Technology Facility (CNF). As part of the cooperation, Cornell staff will perform research using SUSS lithography equipment, including enhanced contact aligner tool sets and a Gamma spray coater.

Keys to CMP and cleans in 2011

01/11/2011 

Robert L. Rhoades, Entrepix, examines the ever-shrinking contamination particle size, and the switch from immersion cleans to single-wafer systems. Custom solutions and new materials at the 22nm wafer fab will mean custom CMP and clean formulations -- if possible, tunable by the user. This is an online exclusive essay in SST's Forecast for 2011: Back to Reality series.

Failure analysis challenges at 22nm turnkey FA tools

01/11/2011 

Paul Kirby, FEI, provides insights on the shift to complex 3D device structures and complex interconnect methods such as TSV. In the future, 3D analysis techniques could play increasingly important roles, he says. In advanced packaging, failure analysis is more critical because multi-die stacks can fail due to one bad die. This is an online exclusive essay in SST's Forecast for 2011: Back to Reality series.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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