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WEBCASTS
 Environment, Safety & Health Date and time TBD The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.
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Wafer Processing Date and time TBD As the industry moves to 10nm and 7nm nodes, advances in wafer processing etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.
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Researchers with the U.S. DOE's Berkeley Lab have been able to fabricate nanochannels that are only 2nm in size, using standard semiconductor manufacturing processes. These channels function differently than their larger counterparts.
Raj Jammy, SEMATECH, explains the details behind contact resistance reduction using dielectric dipole-mitigated Schottky barrier height (SBH) tuning on a FinFET source/drain. Reduction of the SBH by 100meV from the AlOx/SiO2 dipole results in a 10Ω-µm2 reduction in specific contact resistivity and a 100Ω-µm reduction in FinFET source/drain resistance (RS/D).
SEMATECH's IEDM 6.2 paper demonstrated self-aligned III-V MOSFETs hetero-integrated on a 200mm substrate and fabricated with state-of-the-art industry standard silicon processing tools. Raj Jammy, SEMATECH VP, materials & emerging technologies, describes in detail the challenges that had to be overcome to complete the research.
Which transistor structures and materials will garner the most support at 16nm and below? In this podcast interview, Dean Freeman, VP of research, Gartner, provides his perspective on the various paths: FinFETS, tri-gates, fully-depleted SOI (FDSOI), Ge/III-V, bulk CMOS, and so on.
At IEDM, Semiconductor Research Corporation and researchers from Waseda University announced process and materials development for precisely controlling both the amount and the position of channel dopants. The researchers say this advance should help extend the manufacturability of semiconductors beyond conventional doped-channel device technologies. The result is projected to enable near atomic-scale devices and single-dopant devices.
Joachim Burghartz, IMS CHIPS, presented an improved version of the group's Chipfilm technology introduced at IEDM 4 years ago. The researchers now have a manufacturable process technology.