Semiconductors

SEMICONDUCTORS ARTICLES



CMP for metal-gate integration in advanced CMOS transistors

11/01/2010  The needs of replacement metal gate HKMG process flows for 45nm node and below CMOS manufacturing are now being met with processes using consumables designed specifically for these steps. Paul Feeney, CMP Fellow, Cabot Microelectronics Corp., Aurora, Illinois, USA

Planar fully depleted SOI: the technological solution against variability

11/01/2010  FDSOI technology exhibits outstanding variability results, thanks to the use of an undoped channel, and to the good control of silicon film thickness already reached today on commercial SOI wafers. F. Andrieu, O. Weber, J. Mazurier, O. Faynot, CEA-Leti, Grenoble, France

Atomic layer deposition goes mainstream in 22nm logic technologies

11/01/2010  Cost-of-ownership (COO) will be a main driver for ALD equipment selection in cost-sensitive markets; and in foundry or other logic applications, equipment choice is more a mix between COO, turn-around time and process performance considerations. M. Verghese, ASM, Phoenix, AZ USA; J. W. Maes, ASM, Leuven, Belgium; N. Kobayashi, ASM, Tokyo, Japan

Dielectric materials evolve to meet the challenges of wafer-level packaging

11/01/2010  New polymers that are capable of buffering die structures from the package stresses will be required of advanced packaging; and materials will continue to evolve to meet the new requirements. Toshiaki Itabashi, DuPont Semiconductor Fabrication Materials, Kanagawa, Japan

VTI-expands-into-consumer-gyroscopes-timing-devices

10/29/2010 

The new VTI consumer gyro, which will be introduced at the Electronica 2010 fair in Munich, is superior in terms of size, power consumption and performance compared to products on the market today, according to VTI.

Ion-implant-debut-VSEA-sub30nm-semiconductor-fab

10/29/2010 

The VIISta Trident high-current ion implanter from Varian Semiconductor Equipment Associates Inc. (NASDAQ: VSEA) enables high-performance, low-leakage devices while improving productivity at the sub30nm wafer fab node.

Northeastern Surface Prep 2010: EUV masks, CMP, solar cell texturing, nano-chopsticks

10/29/2010 

Techcet's Michael A. Fury reports from the 7th International Surface Cleaning and Preparation Workshop put on by Northeastern and Hanyang universities in Boston, with early talks involving various themes: EUV mask cleaning and chemical mechanical planarization (CMP), crystalline silicon solar cell texturing, and even nano-chopsticks.

Carl-Zeiss-Synopsys-collaborate-in-die-registration-metrology-photomask manufacturing

10/28/2010 

carl zeiss proveCarl Zeiss SMS and Synopsys will collaborate to support in–die metrology solutions for the 32nm technology node and below. Using CATS as a data preparation engine, mask engineers using PROVE can benefit from improved efficiency and usability of a registration metrology system that meets stringent overlay accuracy requirements.

Advanced IC packaging report covers key techs, markets

10/28/2010 

New Venture Research, a technology market research company, released "Advanced IC Packaging Technologies and Markets, 2010 Edition," a strategic report on the latest technologies in IC packaging, with forecasts of key markets.

IEDM preview: Multi-threshold-voltage Flexibility in FDSOI

10/27/2010 

Under the theme at this year's IEDM of better ways to generate, transmit, use, and save energy, a group of researchers from Europe will demonstrate low-Vt nMOS and pMOS workfunction-adjusted devices manufactured using TiN/TaAlN metal gates in ultrathin fully-depleted silicon-on-insulator (FDSOI) substrates.

RAM-memory-research-A-RAM-RERAM-MSDRAM-MELRAM projects

10/27/2010 

CNRS research on memory wafer fabWhile speculation abounds about what will be the next generation of memories and their applications, CNRS, a French government-funded research organization, has 4 new concepts of memories in 2010. The organization is actively recruiting collaborators on RE-RAM, A-RAM, MS-DRAM, and MELRAM memory technologies.

Vishay Siliconix Medical MOSFETs marks foray into implantable apps

10/25/2010 

Vishay Intertechnology Inc. (NYSE: VSH) released two devices in its first family of power MOSFETs built on an enhanced process flow with strict manufacturing process controls for implantable medical applications.

Ion implantation: Device process optimization for Nwell implant on CMOS 13?m

10/25/2010 

Ion implantation: Device process optimization for Nwell implant on CMOS 13umOver the years, undesirable process effects related to ion implantation have become well known: the like channeling effect, for example, and how to minimize it for 25μm and 13μm mature technology. Patrick Demarest, Altis Semiconductor, describes how a stable process can emerge in data mining analysis for low final test yield, and provides definitions for incidence, tilt and twist angles, and channeling effects.

IEDM Preview: CMOS imager works from light to night

10/22/2010 

At the upcoming IEDM conference in December, researchers from NoblePeak Vision will explain how they achieved the first large-scale integration of a single-crystal germanium photodiode into a silicon imager, creating a CMOS sensor that offers high-resolution night imaging under moonless conditions.

Electron beam lithography facility supplied for Yorkshire universities' nanotechnology engineering

10/22/2010 

Electron beam lithography facility supplied for Yorkshire universities' nanotechnology engineeringThe University of Leeds in Yorkshire, UK, will install a JEOL electron beam lithography system. Researchers will use the litho system for nano-scale electronics and spintronics device research, as well as development of magnetic materials.

New photolithography technology for photonics patterning from Eulitha

10/20/2010 

Eulitha developed a proprietary photolithography technology for low-cost and high-throughput fabrication of photonic nanostructures. Eulitha developed a proprietary photolithography technology for low-cost and high-throughput fabrication of photonic nanostructures. The patented technology enables the formation of periodic nanostructures over large areas for such applications as LEDs, solar cells, and flat-screen displays.

Analysts' take: Intel's $8B push to 22nm stays in the US

10/19/2010 

Analysts break down Intel's $6B-$8B pledge to build and expand its US facilities to accommodate 22nm process technologies: what sites get new tools (and who gets the old ones), and why the new R&D fab's name isn't logical.

IEDM preview: IM Flash details 25nm NAND

10/18/2010 

Intel and Micron researchers will reveal the key process advances and electrical results behind their multilevel cell (MLC), 64Gb NAND flash memory technology at the upcoming International Electron Devices Meeting (IEDM) in December.

ISMI packs up, heads to UAlbany NanoCollege

10/15/2010 

The International SEMATECH Manufacturing Initiative Inc. (ISMI) will relocate its headquarters and operations to CNSE's Albany NanoTech Complex beginning in January 2011. It is expected to create more than 100 jobs in NY.

Memory growth drives Sonics to open Taiwan design center

10/15/2010 

Sonics added a design center in Taipei, Taiwan, to accommodate increasing demand for its line of memory subsystem solutions. Sonics' R&D efforts will focus on existing as well as future memory subsystem technologies to help SoC designers solve memory bottleneck challenges and cost-effectively increase memory bandwidth and DRAM efficiencies.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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