Semiconductors

SEMICONDUCTORS ARTICLES



IEDM news: NEC's low-k Cu-interconnect structure, and "channel-engineering" designs

12/17/2007  December 16, 2007 - At this year's IEDM, NEC and NEC Electronics unveiled new design technology to optimize ultrashallow-junction channel structures in 32nm-and beyond LSIs, as well as a new composite film to enable a "full low-k" Cu interconnect structure with k reduced nearly a third compared to conventional barrier dielectrics.

Wafer Probe Card

12/14/2007  The TrueScale PP40 wafer probe card is designed to enable high-efficiency and high parallelism wafer probing on advanced wire bond logic and SoC devices. By supporting pad pitches down to 40 microns, this probe card allows IC manufacturers to shrink the size of their test pads, enabling some users to retain a single-row pad layout.

IEDM news: Panasonic shows >10kV GaN power transistor

12/14/2007  December 14, 2007 - At this week's IEDM, Matsushita Electric Industrial Co. Ltd. said it has built a gallium nitride (GaN) power transistor on a sapphire substrate with ultrahigh breakdown voltage of 10,400V, more than 5X higher than the top mark for other such devices.

IEDM news: Fujitsu updates work on ReRAMs, multilayer interconnects

12/14/2007  December 14, 2007 - At this week's IEDM, Fujitsu discussed its recent progress in developing multilayer interconnect technology for logic LSI devices at and beyond the 32nm node, and its work with a new resistive RAM (ReRAM) memory as a possible alternative to flash for embedded applications.

Celerity wins permanent injunction against Ultra Clean

12/14/2007  December 3, 2007 -- /PRNewswire/ -- MILPITAS, CA -- Celerity, Inc. announced today the U.S. District Court for the Northern District of California issued a permanent injunction in Celerity's patent infringement suit against Ultra Clean Holdings, Inc., and its subsidiary Ultra Clean Technology Systems and Service, Inc.

SRC, Glasgow to research compound semis for 8nm features

12/13/2007  December 13, 2007 - The Semiconductor Research Corp. (SRC) and U. of Glasgow are partnering to identify "the best" p-channel material to scale MOSFET minimum feature sizes, including gate length, down to 8nm, possibly extending scaling for another 4-6 years beyond current projections.

SIA Hails 60th Birthday of Microelectronics Industry

12/13/2007  ; The Semiconductor Industry Association (SIA) today hailed the transistor as the greatest invention of the 20th century. The first working transistor was created 60 years ago, on December 16, 1947, at Bell Laboratories in New Jersey. The inventors — William Shockley, John Bardeen, and Walter Brattain — were awarded the Nobel Prize in Physics in 1956 for their invention.

Oxford Instruments to equip new UK lab

12/13/2007  Oxford Instruments has received an order for nine process tool systems worth more than £2.5m ($5m) to equip a new cleanroom facility at the University of Southampton in the UK, the company announced in a news release.

Micron touts new 68nm 1Gb DDR2

12/13/2007  December 13, 2007 - Micron Technology says it has produced samples of a 1Gb DDR2 device using 68nm process technologies. Mass production is planned for early 2008, followed by DDR3 and other low-power DRAM products in 2H08.

Teradyne tests flash mettle with Nextest M&A

12/12/2007  December 12, 2007 - Teradyne and Nextest have agreed to a $325M acquisition that gives system-on-chip test provider Teradyne a big slice of the projected $700M flash memory tester market.

X-Fab licensing process tech to Brazil for first 150mm fab

12/12/2007  December 12, 2007 - German chipmaker X-Fab Silicon Foundries has agreed to license its 0.6-micron process technology ("XC06") to Brazil's CEITEC (Excellence Center for Advanced Electronic Technology), for use in CMOS semiconductor manufacturing in the country's 150mm prototype frontend wafer fab, slated to open in 3Q08.

Palomar Partners with Vision Manufacturing to Add PWB and SMT Services

12/11/2007  ; Palomar Technologies has announced a partnership with Vision Manufacturing Inc. (VMI) of Vista, CA. Through VMI, Palomar Microelectronics can offer printed wiring board (PWB) and surface mount technology (SMT) services for its customers to supplement the process development, prototyping, and low volume assembly services Palomar Microelectronics provides.

2007 IEDM: Darts hit elements all over the period table

12/11/2007  Over 1600 technologists are gathered in Washington, DC, to explore a wide range of innovative ideas at the 2007 International Electron Devices Meeting (IEDM). While current mainstream CMOS approaches, using strain engineering and metal/high-k dielectric gates, are covered extensively, a wide range of further out alternatives suggests that darts have been tossed at periodic table charts all over the world.

Etch+clean: Lam Research widening scope with SEZ buy

12/11/2007  December 11, 2007 - In a move that combines two of the most frequent semiconductor process steps (etch and clean), Lam Research has agreed to acquire Austrian firm SEZ Group for $568M in cash.

IEDM news: TSMC reports 32nm SRAM, sans HK+MG

12/11/2007  December 10, 2007 - Top global foundry TSMC says it has developed a 2Mb SRAM test chip with 32nm process technologies that supports both analog and digital functionality -- and doesn't rely upon high-k gate dielectrics or metal gates.

Interview: Advantest sees order recovery in mid-'08

12/11/2007  December 10, 2007 - In an interview with Japan's Nikkei daily, Advantest president Toshi Maruyama admits the company misjudged the timing of the DRAM price drought, but is optimistic that backend tool orders will pick up by next summer -- as long as midsize manufacturers get back in the game, and the US subprime mortgage debacle doesn't sour consumer spending habits.

KLA-Tencor, Nikon collab to corral "mix-and-match" litho setups

12/11/2007  December 10, 2007 - KLA-Tencor and Nikon say they have developed a set of fully automated system tools for correcting overlay errors in "mix and match" lithography setups that encompass tools of varying capabilities and from different suppliers.

Tessera's ITC complaint targets DRAM makers

12/11/2007  December 10, 2007 - Tessera Technologies has filed a new complaint with the US International Trade Commission (ITC) alleging unlawful importation and sale of certain small-format BGA semiconductor packages and products, including DRAM memory chips, memory modules, and the computer systems incorporating them.

IBM: We've made 32nm high-k "gate first" SRAMs

12/10/2007  December 10, 2007 - IBM says it has fabricated 32nm chips using a high-k/metal gate (gate-first) process in SRAM chips, which it says shrinks the chips size by up to 50%, and saves about 45% total power. The technology is expected to be available in 2H09.

JSR, IBM to work on new materials, self-assembly

12/10/2007  December 10, 2007 - IBM and JSR Micro say they will worth together to explore new technologies for emerging semiconductor materials and processes, targeting next-generation lithography as well as self-assembly applications.




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Environment, Safety & Health

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The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

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As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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