06/27/2007  June 27, 2007 - Qimonda AG and Taiwan's Winbond Electronics Corp. have extended their DRAM foundry agreement, under which Qimonda will transfer 75nm and 58nm DRAM trench technology to Winbond's 300mm facility in Taichung, Taiwan.

06/27/2007  June 27, 2007 - FSI International says it has been granted a US patent (#7,235,495) for a surface preparation method of forming an ultrathin silicon oxide layer prior to depositing high-k film.

06/27/2007  June 11, 2007 -- /PRNewswire/ -- ALLENTOWN, PA -- Akrion, Inc., a leading supplier of semiconductor surface preparation equipment, today announced the sale of an E200 system for 200 mm semiconductor wafer cleaning to a fabrication plant in the United States.

06/26/2007  Andrew Chien is head of all Intel research, responsible for thinking about new microprocessors, new applications, and novel fab-able devices. He talked with WaferNEWS during the chipmaker's Research Day about where opportunities exist in the intersection of digital CMOS fabrication technology and biological applications, how Intel is trying a super-computer architecture end-run on IBM's Blue Gene, and why it's becoming much easier for designers to innovate at the architectural level.

06/26/2007  June 4, 2007 -- /PRNewswire-FirstCall/ -- BILLERICA, MA -- GSI Group Inc., a supplier of precision technology and semiconductor systems, today announced that a new customer, Rexchip, has ordered multiple M550 Infrared laser based wafer repair systems.

06/26/2007  June 26, 2007 - A pair of deals announced today serve to bolster Applied Materials' foothold in the solar market: a $475 million acquisition of a Swiss maker of wafering systems, and a new thin-film solar module customer in Taiwan.

06/26/2007  Last week, WaferNEWS reported on research revealed at the recent VLSI Symposium in Japan about high-k dielectrics and metal gates (HK+MG) from top chipmakers including Intel and IBM, as well as NEC, Toshiba, and Samsung. This week we look at HK+MG work and other leading-edge research being done by consortia, through exclusive interviews with SEMATECH and IMEC.

06/26/2007  Intel typically uses its annual "Research Day" to provide a glimpse into potential commercial applications for the chipmaker's technologies. But this year's event (June 20) also demonstrated the way Intel's technology advances the chipmaker's own electronics manufacturing -- showing how "computational lithography" will be the backbone of Intel's proprietary DFM strategy for the foreseeable future.

06/26/2007  Manufacturing of deep trenches poses great challenges, especially the etching of deep, high-aspect ratio (>20:1) bottle-shaped cavities into the silicon substrate. In particular, the sidewalls of high-aspect ratio trenches may collapse during the isotropic wet etch step, so a fast and non-destructive technique is needed to inspect for such damage. To this end, Vistec Semiconductor Systems GmbH and Qimonda have developed a new in-line optical inspection technique for deep-trench DRAM structures.

06/25/2007  June 25, 2007 - Hynix Semiconductor reportedly will migrate its 60nm NAND flash to 57nm production at its 200mm fabs in 3Q07 in a move to cut costs by around 20%, as rivals Samsung and Toshiba continue to press on to 56-50nm, according to a Digitimes report citing "downstream customers."

06/22/2007  Fraunhofer Center Nanoelectronic Technologies uses Vistec tool for nano chip innovations

06/21/2007  June 21, 2007 - A new study by Wright Williams & Kelly Inc. and Strategic Marketing Associates sheds light on what people in the industry think will be most likely to hit production process lines in the next 2-5 years, and which ones may take longer than expected to be adopted into manufacturing lines, if ever.

06/20/2007  June 20, 2007 - North American-based manufacturers of semiconductor manufacturing equipment saw sales and orders not quite as good in May as they were in April, but one bright spot is a continued slight uptick in demand for their tools, according to the latest monthly data from SEMI.

06/20/2007  IMEC, the independent nanoelectronics research center in Leuven, Belgium, has ordered Akrion Inc.'s 300mm single-wafer surface preparation system, Velocity. IMEC will use the 4-chamber Velocity to develop and test new back- and front-end-of-line process recipes for IC device manufacturing at the 32 nm technology cycle.

06/20/2007  In an exclusive interview with WaferNEWS, Mukesh Khare, project manager for IBM's high-k/metal-gate development, discusses details of the company's new high-k/metal-gate (HK+MG) transistor technology, a "gate first" approach that keeps the same processing sequence used by traditional SiON gates, allowing for both technologies to be run on the same line and minimizing integration costs. "We picked the approach that is simple, scalable, and also migrate-able," he explained.

06/19/2007  This year's VLSI Symposium (June 12-14, Kyoto, Japan) revealed there will be not one, but many different solutions for the production implementation of hafnium-based oxides at the 45nm node and beyond -- e.g., poly or MIPS gate electrodes, single- or dual-metal, and various gate process flow integration approaches, from gate-first to gate-last and even a hybrid. The question is, how long can the industry support these multiple approaches? Will they converge beyond the 32nm node -- if at all?

06/19/2007  June 19, 2007 - Klaus Schruefer, chief scientist for Infineon's multigate FET technology project, tells WaferNEWS why mugFETs are being pushed out beyond 32nm, and what's highest on the to-do list to get the technology ready for chip manufacturing, even by the 22nm node.

06/19/2007  June 19, 2007 - Matsushita Electric Industrial Co. says it has begun the "world['s] first" mass production of 45nm LSI chips at its factory in Uozu, central Japan, using ArF immersion lithography (NA>1) with "proprietary super-resolution enhancement technology" and multilayer wiring using low-k dielectrics.

06/18/2007  The DSM200 automated metrology system performs cassette-to-cassette front-to-back alignment for front- to back-side alignment applications, such as MEMS, power semiconductor, and optoelectronics assembly.

06/15/2007  June 15, 2007 - NEC Corp. and NEC Electronics Corp. say they have jointly developed a "breakthrough" yield-evaluation method to enable robust design of low-power, high-performance system LSIs.