06/15/2007  June 15, 2007 - Renesas Technology Corp. has developed a technology for implementing SRAM in 32nm processes and beyond for on-chip SRAM incorporated into a microprocessor or SoC.

06/15/2007  June 15, 2007 - Renesas Technology Corp. is reporting improved results for its high-performance transistor technology with "low-cost fabrication capability" for 45nm-and-below microprocessors and SoC devices, utilizing the company's complimentary metal insulator semiconductor (CMIS) hybrid structure first disclosed at IEDM in December 2006.

06/14/2007  As part of research designed to manufacture carbon nanotubes (CNTs) as viable replacements for copper in 3D die-stacking applications, researchers at Rensselaer Polytechnic Institute have implemented a method for compacting CNTs into bundles, enabling better thermal and electrical conductivity. Densification occurs post-growth, allowing scientists to use a known, conventional CNT growth process. CNT density was increased 5–25× in the experiments.

06/14/2007  June 14, 2007 - Samsung Electronics Co. Ltd. has opened its new 300mm NAND flash memory wafer plant in Austin, TX, a $3.5 billion facility nearly twice the size of Samsung's adjacent existing 200mm fab. The new 300mm site will start operation later this year initially focusing on 16Gbit flash chips and 50nm process technologies, and ramp to 60,000 wafers/month output by 2008.

06/14/2007  June 14, 2007 - Silterra Malaysia says it has signed a "joint development project" with European R&D consortium IMEC to create a foundry-compatible 90nm CMOS process technology, based on IMEC's process, with intention to scale to 65nm (while developing a 110nm derivative in parallel). The two already had worked on 0.13-micron process technology under a deal signed in June 2004.

06/14/2007  June 14, 2007 - Luminescent Technologies Inc. says it has raised $9 million in a new round of financing, led by new investor Adams Capital Management along with existing investor Sevin Rosen Funds. The funds will be used to continue driving adoption of the company's inverse lithography technology (ILT), which it is touting as an alternative to optical proximity correction (OPC), offering better pattern fidelity and broader lithography process windows.

06/14/2007  June 13, 2007 - Providing updates on work performed with its 32nm CMOS research partners at this week's VLSI Symposium, IMEC says it has improved its process to yield "reproducible" finFETs with fin widths down to 5nm, and high aspect ratios, using 193nm immersion lithography and dry etching. However, "several bottlenecks have to be overcome" before the finFETs can be viable in manufacturing.

06/14/2007  June 13, 2007 - With prices showing signs of firming up and demand on the rise, Toshiba Corp. says it will increase production capacity of mainline flash memory by 70% over the next 12 months, according to the Nikkei daily paper.

06/14/2007  June 13, 2007 - STMicroelectronics says it has taped out the design for a low-power system-on-chip (SoC) "demonstrator" device with a multiple threshold transistors, dual-core CPU and associated memory hierarchy. The process improves speed by 20% vs. 65nm designs or reduces leakage current by half when in operation (and by "several orders of magnitude" when in retention mode), and takes up half the silicon area.

06/14/2007  June 13, 2007 - Swiss firm Synova SA and the German subsidiary of Japan's Disco Corp. say they are developing a hybrid dicing tool that combines Synova's Laser Microjet water-jet-guided laser technology with Disco's blade-saw dicing technology, to give semiconductor customers a high-throughput tool that minimizes damage to silicon and advanced-material wafers.

06/13/2007  June 13, 2007 - With chip sales "running well short" of last year's projections for several months now, the SIA has significantly scaled back its expectations for semiconductor industry growth this year. The SIA now projects just 1.8% growth this year to $252 billion, instead of ~10% growth anticipated from its outlook last November.

06/13/2007  June 13, 2007 - Infineon has disclosed an update to its work with multigate transistors, saying it's completed tests of circuits made with the new transistor architecture on 65nm processes, incorporating more than 23,000 transistors that incorporate "all of the key components" in current circuits plus SRAM. The device's record 13.9 picosecond switching time is 40% better than the previous version, touted at December's IEDM.

06/12/2007  June 12, 2007 - Tezzaron Semiconductor says it is ramping its 2D "3T-iRAM" line of 72Mbit memory devices at Singapore foundry Chartered Semiconductor on the foundry's 0.13-micron process technology, and plans to use this SRAM drop-in replacement as the basis for its first 3D ICs. Robert Patti, Tezzaron CTO, discusses both technologies with WaferNEWS.

06/12/2007  Semico Research's latest semiconductor market revenue forecast calls for a slight (0.5%) decline for the remainder of 2007 but shows a highly elastic (20%) rebound in 2008, with continued double-digit expansion for the next several years. Fueling this growth will be not a single killer app, but a host of innovative consumer electronic products, according to Jim Feldhan, president of the market research firm, speaking at a recent SEMI New England Breakfast meeting near Boston.

06/12/2007  Samsung, Hynix, and Akita Elpida have all made announcements recently about their latest achievements in memory stacking technology. There was definitely a competitive tone to these releases, but they actually appear to be pushing somewhat different agendas.

06/12/2007  June 12, 2007 - The image sensor market is projected to grow 14% in 2007, following 30% growth in 2006 to roughly $6 billion, and will slow through the next several years, with many providers jostling for position, according to a report from Strategies Unlimited.

06/12/2007  Presenting at the VLSI Symposium this week in Japan, Toshiba says it has developed a 3D memory cell array structure using through-silicon vias (TSVs) that could be a potential candidate for higher-density NAND flash devices.

06/12/2007  June 12, 2007 - Presenting at the VLSI Symposium this week in Japan, Toshiba says it has developed a new 3D memory cell array structure using through-silicon vias that could be a potential candidate for higher-density NAND flash devices.

06/12/2007  A roundup of news from the past week in Japan finds PC makers turning to flash, chemical makers opening their wallets, new silicon transport components, and a behemoth of a CMOS image sensor prototype.

06/12/2007  The U.S. Patent and Trademark Office (USPTO) has notified NVE Corporation, Eden Prairie, Minn., of the expected grant of a patent titled "Thermomagnetically Assisted Spin-Momentum-Transfer Switching Memory," relating to magneto-thermal and spin-momentum transfer MRAM inventions.