01/31/2007  A major Korean semiconductor manufacturer placed an order with the SEZ Group for Da Vinci systems, to be used for back-end-of-line (BEOL) polymer removal. The four systems will perform aluminum/copper polymer cleans on 300- and 200-nm DRAM memory devices with sub-90-nm process technologies.

01/31/2007  January 31, 2007 - Qimonda AG is evaluating various locations across Asia for a proposed 300mm wafer fab, including Taiwan, Singapore, and mainland China, which would expand the company's operations outside Europe and the US, according to the Taiwan Economic News.

01/30/2007  Building on its venerable Surfscan unpatterned-wafer inspection legacy, the new SP2^XP system from KLA-Tencor Corp. is designed for the 45nm IC manufacturing requirements for all types of bare wafers. The company claims the system can detect all major types of defects of interest, and quickly group wafers into defect-free, reworkable, and scrap categories.

01/30/2007  After attending a demo at Intel HQ the day before the big announcement, SST Senior Technical Editor Mark Levenson thinks achieving first production as scheduled in 2007 would have been a significant technological milestone by itself -- but getting the first design, first mask set, and first silicon all working properly was stunning.

01/30/2007  A minor update to the International Technology Roadmap for Semiconductors was released in December, before next year's full ITRS revision. An examination of the new content in the assembly and packaging chapter illuminates concerns about package substrates keeping up with advances in silicon technology, as well as a variety of challenges in thinned-die packaging.

01/30/2007  January 30, 2007 - Count one more chipmaker that's decided to get out of the leading-edge R&D rat-race. Cypress Semiconductor Corp. says it is selling its Silicon Valley Technology Center (SVTC) 65nm process R&D shop to a pair of private equity firms for approximately $53 million in cash.

01/29/2007  January 29, 2007 - Isonics Corp. directors have decided to exit the life sciences business following two years of a "challenging operating environment" in order to pursue a brighter future in semiconductor wafer services.

01/29/2007  January 29, 2007 - Extreme ultraviolet lithography (EUV) and 193nm immersion lithography will be a primary focus of SEMATECH's 2007 Knowledge Series seminars in the upcoming year, the group said today in a statement. Other areas will include materials to enhance transistor and backend development, and methods to improve manufacturing efficiency and yield.

01/29/2007  January 29, 2007 - So who are the tool supplier winners behind Intel's big announcement that it's using high-k/metal gate (HK+MG) technology in 45nm transistors slated for shipment later this year? One firm reportedly thinks it knows the answer at least for one of the hotly contested process areas: atomic-layer deposition (ALD).

01/29/2007  January 29, 2007 - Hours after Intel uncrated its 45nm transistors using high-k dielectric and metal gates for shipment later this year, SEMATECH and the IBM Common Platform Alliance both released statements indicating that they, too, are in the final stages of tinkering with the technologies.

01/29/2007  January 29, 2007 - Touting "a significant breakthrough in transistor technology," Intel Corp. says it has progressed its 45nm process technology from a SRAM test chip unveiled in Jan. 2006 into a working 45nm transistor -- devices that incorporate a hafnium-based high-k dielectric material and a new combination of metals for the transistor gate electrode. The new "Penryn" transistor will start shipping in volume by year's end on various systems, including those with Microsoft Vista OS.

01/26/2007  January 26, 2007 - A month after making a splash with plans to create a DRAM megafab joint venture, partners Elpida Memory Inc. and Powerchip Semiconductor Corp. have finalized some of the details, including the name of the venture, initial investment levels, and a schedule for equipment installation and mass production.

01/25/2007  January 25, 2007 - Toshiba Corp. and SanDisk Corp. say they have developed 16Gb (2GB) and 8Gb (1GB) NAND flash memory fabricated with 56nm process technologies.

01/25/2007  January 25, 2007 - Though it will follow through with 45nm work done with its Crolles2 alliance through the end of this year, STMicroelectronics will seek to pursue 32nm development elsewhere with partners and/or in the framework of an alliance, executives indicated in the company's quarterly results conference call. Crolles2, meanwhile, will narrow its focus to "derivative technologies" that support ST's wireless and mobile applications efforts.

01/25/2007  January 25, 2007 - SEMATECH and Tokyo Electron Limited (TEL) have entered into a multiyear joint development program to improve prospects for using 3D interconnect technology and high-mobility channel materials in advanced semiconductor manufacturing, both sides said today in a statement.

01/25/2007  January 25, 2007 - The semiconductor lithography market expanded at nearly twice the rate of the rest of the equipment industry in 2006 to top $6.7 billion, finally eclipsing the $6.0 billion mark achieved back in 2000, according to a report from The Information Network.

01/25/2007  A team of UCLA and Caltech chemists reported the successful demonstration of a large-scale, "ultra-dense" memory device that stores information using reconfigurable molecular switches. This research represents an important step toward the creation of molecular computers.

01/25/2007  OKI and ZyCube announced an agreement to cooperate in commercializing ZyCSP™ an image sensor LSI with buried interconnects (also called TSV (Through Silicon Via)) that is equivalent in size to a wafer level chip size package(CSP). The companies' state that compared to current CMOS and CCD sensor packages, the ZyCSP™ achieves thinner, smaller, lighter and highly reliable characteristics.

01/24/2007  Surface Technology Systems plc (STS) won a European Union (EU) tender from the Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM (Munich, Germany) for an MPX Pegasus system. The advanced silicon etch (ASE) system has a single process chamber with manually loaded vacuum loadlock and a carousel wafer handler for 2-4 wafers. Fraunhofer IZM will use the system in industrial R&D for packaging applications.

01/24/2007  Tokyo Ohka and Hitachi have demonstrated patterns with 28nm half-pitch resolution, with EUV resist made using small molecules that eliminate much line-edge roughness.