Semiconductors

SEMICONDUCTORS ARTICLES



SMIC reportedly led TSMC in capacity utilization competition in 2Q

07/06/2005  July 6, 2005 - In the second quarter, Semiconductor Manufacturing International Corp. (SMIC) ran its capacity at an 86% rate, higher than the 84% recorded by foundry Taiwan Semiconductor Manufacturing Co., a Merrill Lynch & Co.'s study shows, according to Taiwan Economic News.

Soluris, CEA-Leti form JDP on sub-45nm logic technologies

07/06/2005  July 6, 2005 - Soluris and CEA-Leti have announced that they have engaged a joint development program (JDP) involving Soluris' Yosemite SP-1000 CD-SEM to help characterize the sub-45nm logic technologies at CEA-Leti's new Minatec research facility in Grenoble, France.

EV Group to support nanofabrication technologies at Stanford with nanoimprint tool

07/06/2005  July 06, 2005 - EV Group, a leading manufacturer of MEMS, nano and semiconductor wafer-processing equipment, announces the installation of an EVG620 precision alignment system for nanoimprint lithography (NIL) at Stanford Nanofabrication Facility (SNF) in Stanford, CA.

July 2005 Exclusive Feature: METROLOGY

Detecting profile excursions using spectroscopic ellipsometry



07/05/2005  By M. Yeh, S.-P. Fang, B.-J. Tsau, C.C. Huang, B. Lin, United Microelectronic Corp.; S. Fu, J. Chen, R. Freed, T. Dziura, M. Slessor, KLA-Tencor Corp.

This work evaluates the capability of a spectroscopic ellipsometry-based profile technology as a new metrology tool to monitor polysilicon gate processes at 130nm and 90nm nodes. This study proves that this method can consistently flag different profile excursions of polysilicon gate.

Strategic Business Forum: Why simulation could push designers to start using DFM

07/05/2005  By: Dr. Paula Doe, Contributing Editor

Narrowing process windows, emerging tools for statistical analysis of design, and model-based simulations of yield results may soon push designers to actually design for manufacturability, argued experts at Semi's Strategic Business Forum in Welches, OR, May 9-11.

Global semiconductor sales decline by 0.5% in May

07/05/2005  July 5, 2005 - Worldwide sales of semiconductors declined slightly in May to $18.05 billion, a sequential decline of 0.5% from the $18.14 billion reported in April, the Semiconductor Industry Association (SIA) reported on July 2. May sales were up 4.1% from the $17.34 billion reported in May 2004.

JMAR awarded $7.5 million more by NAVAIR for x-ray mask program

07/01/2005  July 1, 2005 - The US government's Naval Air Warfare Center (NAVAIR), under DARPA sponsorship, has granted JMAR Technologies Inc. a two-year extension valued at $7.5 million to its existing three-year $10 million contract to continue development of sub-100nm feature x-ray masks for next generation lithography and production of Zone Plate optics for x-ray microscopes and nanoprobes.

Nikon develops advanced immersion system for 45nm process development

07/01/2005  July 1, 2005 - Nikon Corp. said yesterday that it has developed a stepper capable of fabricating semiconductor chips with a linewidth of 50nm or smaller, for launch late this year, according to JIJI and other press reports. The NSR-S609B, an ArF immersion scanner with an NA projection lens of 1.07, is targeted at mass production of 55nm and development of 45nm devices.

Particles

07/01/2005  News snippets from the world of contamination control.

Advanced lithography techniques present new contamination challenges

07/01/2005  AUSTIN, TX-With the second quarter of 2005 already underway, research consortium SEMATECH (www.sematech.org) is looking ahead to technical challenges facing the semiconductor industry in 2006. From lithography and various device components to metrology, manufacturing effectiveness, and environment, safety, and health (ES&H), the consortium sees significant contamination-control concerns-particularly with lithography and new materials.

Test shows progress in war against SO2

07/01/2005  MINNEAPOLIS, Minn.-Recent independent testing of filter technology developed by Donaldson Company Inc. (www.donaldson.com) offers optimism in the battle against sulfur-dioxide (SO2) contamination in semiconductor manufacturing.

Wafer environment nanoparticle contamination control and defect reduction in front-end-of-line (FEOL) cleaning processes

07/01/2005  The complexity of semiconductor device manufacturing processes is increasing as scaling of ICs continues with shrinking feature sizes. With this complexity, contamination control of nanosize particles is increasingly becoming more important during fabrication. The ITRS guidelines in Table 1 show the stringent purity requirements for liquid chemicals to be used in the manufacture of next-generation semiconductors.1

ON Semiconductor to cut work force, transfer some operations to US

06/30/2005  June 30, 2005 - ON Semiconductor has announced its plan to transfer wafer-fab operations from its Site 2 facility in Seremban, Malaysia, to its facility in Phoenix by the end of 2006, resulting in the loss of ~80 jobs. As a result, the company expects to save a total of ~$25 to $30 million over the next five years, beginning in the 3Q06.

Rudolph and August sign definitive merger agreement

06/29/2005  June 29, 2005 - Rudolph Technologies Inc. has signed a definitive merger agreement with August Technology Corp. The transaction has been unanimously approved by the board of directors of both companies, is subject to customary regulatory approvals and shareholder vote of each company, and is expected to close in the 4Q05.

Applied Materials to Acquire Wafer Clean Technology from SCP

06/29/2005  SANTA CLARA, CA--(BUSINESS WIRE)--June 28, 2005--Applied Materials, Inc., the world's largest supplier of wafer fabrication solutions to the global semiconductor industry, today announced the signing of a definitive agreement with SCP Global Technology, Inc. to acquire SCP's single-wafer HF-last immersion technology and Marangoni(R) clean/dry intellectual property.

Selete develops polishing technology for 45nm chips

06/24/2005  June 24, 2005 - Semiconductor Leading Edge Technologies Inc. (Selete) has developed a new polishing technology for the 45nm generation of chips, according to the Nikkei English News. The technology is basically a reversal of the process of metal electroplating, and it works to smooth down the circuit wiring layered over the transistors on the wafer without damage to the neighboring regions of insulator.




WEBCASTS



Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

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Wafer Processing

Date and time TBD

As the industry moves to 10nm and 7nm nodes, advances in wafer processing – etch, deposition, planarization, implant, cleaning, annealing, epitaxy among others – will be required. Manufacturers are looking for new solutions for sustained strain engineering, FinFETs, FDSOI and multi-gate technologies, 3D NAND, and high mobility transistors.

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