Issue



Table of Contents

Solid State Technology

Year 2010
Issue 5

COLUMNS

Editorial


Understanding Nanotechnology Safety

Pete Singer, Editor-in-Chief


Industry Forum


Refurbished equipment: heating up and coming of age

Leading-edge fabs can stay competitive and productive with equipment strategies that reduce capital expenditures and increase profitability by comparing the advantages of buying new equipment vs. refurbished. Byron Exarcos, ClassOne Equipment Inc., Atlanta, GA USA


DEPARTMENTS

World News.html


World News


Technology News


Applied's new InVia lays it on thick for 3D IC packaging


Technology News


Inside the SOI Consortium's IP program


Technology News


Mentor Graphics unveils IC package thermal characterization and design tool


Technology News


SII, IME develop Si-based resonator, WLP tech


Product News.html


Product News


FEATURES

Cover Article


Low-k damage reduction using a modified plasma strip process

A new strip method has been developed to simultaneously remove post-etch polymer while minimizing damage to the low-k film, thus enabling the integration of ULK films into advanced dual damascene structures. Rajesh Mani, Bing Ji, Steve Sirard, Andrew Bailey, Lam Research Corp., Fremont, CA, USA


Copper Interconnects


Copper electroplating approaches for 16nm technology

Although additive and current waveform effect dominate fill capability, characteristics of the electroplating bath such as temperature, ionic concentrations, and corrosion potential must also be optimized for 16nm performance. Jonathan Reid, Andrew, McKerrow, Sesha Varadarajan, and Greg Kozlowski, Novellus Systems, Inc., San Jose, CA USA


Pop _package On Package


Improving package-on-package reliability: a multi-material approach

Incorporating proven, high reliability materials at all layers of the device — from the package level to the board level — will go a long way toward advancing electronics technology, especially for the handheld sector. Mark Currie, Henkel Corporation, Irvine, CA USA


Test Sockets_and_probe


System integration is key to optimum test cell performance

There are many areas within a test system in which a more integrated approach can improve performance and reduce cost. Gerhard Gschwendtberger, Multitest elektronische Systeme GmbH, Rosenheim, Germany