Issue

The semiconductor industry has matured by most measures. With one exception, it is profitable, and managers appear to have figured out how to balance supply (capacity) with demand.

Global semiconductor sales are seen growing just under 5% in 2008, better than the 3.2% seen in 2007 but only half of the 9.1% expected just six months ago, according to new calculations from World Semiconductor Trade Statistics Inc. (WSTS).

With almost all major R&D lithography efforts reporting at SEMATECH’s Litho Forum (May 12-14, 2008, Bolton Landing, Lake George, NY), the common theme resonating throughout a debrief with forum co-chair Mike Lercel (and SEMATECH’s lithography director) and program chair Bernie Roman is one of great progress made on many fronts with a growing interest in maskless/e-beam lithography.

Primarily driven by immersion lithography, defects on the wafer edge can transfer to the circuit areas and kill yield, and may be removed using wet etches, dry plasma etches, lasers, and mechanical abrasion.

Though semiconductor researchers spent years trying to identify an alternative to SiO2 for the transistor gate dielectric, it turns out that search was the easy part.

Novellus Systems has released two new variations on its Gamma multi-station sequential processing (MSSP) architecture, targeting high volume memory and logic/foundry fabs.

Cascade Microtech has unveiled a new test system designed to measure flicker noise in ICs, seen as a barrier to lowering device operating voltages as geometries shrink–and a strategic initiative to integrate measurements systems to provide users with measurement accuracy assurance.

This month, SST presents a preview of the July edition of Chip Forensics, an online column by Dick James, senior technology adviser at Chipworks, a specialty reverse-engineering company that takes apart ICs and electronics systems in order to provide engineering information for its customers.

The Imprio HD 2200 is the latest addition to the company’s family of Step and Flash Imprint Lithography (S-FIL) tools for hard-disk-drive (HDD) applications.

The Electro Plus Fusion Machine, with hand-held user interface, speeds the electrofusion joining process of thermoplastic pipe and fittings and can be used with several of the company’s piping systems.

Step-and-scan and resolution enhancements in optical lithography have enabled printing much smaller usable features.

The manufacturing infrastructure for high-k stacks is reasonably mature. Manufacturers have access to the toolsets and precursors they need, even if they aren’t sure thus far what structure to build.

Since the early 2000s, many new electronic materials have been explored and incorporated into silicon CMOS transistors for enhancing their device performance and energy-efficiency.

Ultra-shallow junctions (USJs) that are <10nm at the 32nm node require the close process optimization of ion implantation (elemental species, energy and dose) with diffusion-less annealing (millisecond and spike combination) in order to reduce device variation and achieve “high-quality” junctions.

Printable electronics has been on an exponential growth curve for many years. Current prospects for printable electronics include sophisticated patterning to create memories and transistors; the variety of materials for printed electronics has also expanded.

To meet next-generation challenges, polyvinyl alcohol (PVA) brush designs may need further optimization in design and materials, and many of the cleaning chemistries and approaches will have to change.

A jointly developed temporary bonding/debonding system designed for ultrathin wafer processing is described, as well as critical parameters to be considered in processing thin wafers, including TSV creation.