Issue



Table of Contents

Solid State Technology

Year 2008
Issue 5

DEPARTMENTS

Editorial


Lithography’s future: tougher than ever

The industry struggle from node to node along the semi-log Moore’s Law track gets ever tougher.


World News


Business Trends

Worries about a looming US economic recession and unexpected softness in the memory sector (particularly NAND) are already causing semiconductor watchers to rethink their expectations for the IC industry in 2008, although there’s still debate over when to sound the alarms.


Tech News


Etching new IC materials at 32nm and 22nm

Silicon Valley was once the center of the silicon-based IC manufacturing world, and although IC fabs are now located globally, the valley maintains momentum as the center of IC R&D.


Mems


Submicron micromachining technology for liquid phase chromatography separation

Liquid phase chromatography is undoubtedly the most powerful technique to separate and identify molecules present in a given sample mixture.


Products


Product News

The VMP electronic variable displacement metering pump dispenses UV-sensitive fluids such as UV-curable adhesives, UV coatings, and photolithography chemicals.


Products


Product Focus Wafer Processing

These sputtering targets are available in 62 different metals and alloys, as well as compounds such as borides, carbides, fluorides, nitrides, oxides, selenides, silicides, sulphides, and tellurides.


Industry Forum


Two keys that unlock 45nm OPC

Stepping into the sub-180nm world creates a new reality far different from what we have known and relied on in the past.


FEATURES

Cover Article


Despite engineering and cost challenges, 32nm node IC manufacturing within reach

There are no insurmountable obstacles foreseen for scaling high-volume manufacturing to the 32nm node for logic in 2009.


Nanotechnology


Fully gate-all-around silicon nanowire CMOS devices

Although CVD-grown nanowires are good for demonstration purposes, getting them into manufacturing calls for the utilization of CMOS fabrication methods.


Interconnects


System-in-package integration of passives using 3D through-silicon vias

Future generations of cellular RF transceivers require higher degrees of integration, preferably using the third dimension.