Issue



Table of Contents

Solid State Technology

Year 2006
Issue 8

DEPARTMENTS

Online Staff Report


The ConFab

Speakers discuss how to manage the new economics of chipmaking


Editorial


Seven habits of effective collaborators

Success will be determined by those companies that can collaborate most effectively.


World News


World News

Citing stronger than expected growth in several key end-markets, notably cell phones, the Semiconductor Industry Association (SIA) has brightened its semiannual forecast for the semiconductor industry.


Tech News


Intel describes CMOS tri-gate integration

Intel Corp. recently presented results of its work with CMOS tri-gate transistors, citing its successful integration of high-k gate dielectrics, metal gate electrodes, and strained silicon to offer considerably lower leakage and consume much less power than today’s planar transistors.


Solid State Lighting


Advances in white LEDs signal a switch to solid-state lighting

Advances in thin-film stacks of inorganic materials, along with improvements in chip-level integration, deposition techniques, and optimized plastic packages, have enabled light-emitting diode (LED) makers to greatly increase luminous efficacy.


Product News


Product News

The Sentry Harsh Chemistry Metrology system offers automated real-time, “proactive” analysis to detect metallic and ultimately organic contaminants in harsh chemistries used in semiconductor manufacturing processes.


Industry Forum


There really is a litho wall

Optical lithography has transcended so many limits set by the promoters of next-generation lithographies that much of the industry acts as if it will live forever.


FEATURES

Cover Article


Foundry implementation of advanced automated decision-making

AMD has shown in its own fabs that very tight and automated control is essential to manufacture leading-edge products.


Etch


Integrating dual workfunction metal gates in CMOS

As MOSFET scales below 45nm, conventional SiO2 cannot sustain equivalent oxide thickness (EOT) and leakage current requirements set in the International Technology Roadmap for Semiconductors (ITRS), due to the limitation of physical-thickness scaling, and high tunneling current [1].


Deposition


Alternatives to low-k nanoporous materials: dielectric air-gap integration

Long considered theoretically possible, air gaps formed within multilevel on-chip interconnect structures are now under serious consideration as a means to lower the k value of intermetal dielectrics (IMD) for future manufacturing nodes.


Materials


A remote carbon method for fabricating strained SiGeC:B layers

Advanced RF BiCMOS technologies that use NPN heterojunction bipolar transistors (HBT) require the lowest possible base resistance, which is achieved with boron doping.


ASIA-PACIFIC

Taiwan


‘Collaborate and thrive’ model enables fast path to high-volume production

Anticipating high customer demand for its new finer linewidth chips, the Taiwan-based fabless Flash manufacturer, Eon Silicon Solution Inc., asked Dongbu Electronics to be ready to not only drive the shift of its Flash memory designs from the 0.22µm to 0.18µm linewidth, but also achieve a fast ramp to high-volume production.


General Asia


Semiconductor industry growth tied to the AP region’s evolution

The Asia-Pacific region has played an integral part in the success of the semiconductor industry for over 35 years, and in turn has been transformed by it.