According to the 2005 International Technology Roadmap for Semiconductors (ITRS), the industry should plan on shifting from 300mm to 450mm wafer production by the year 2012.
The practice of using design rules to communicate manufacturing capability to the design community failed with the advent of sub-wavelength imaging’s recommended and suggested design rules.
Chipmakers are migrating to single-wafer tools, driven by the need for highly reliable processes that can meet the stringent performance and throughput requirements of state-of-the-art fabs.
Conventional precision engineering technologies are reaching their limits concerning minimum feature size and precision demands, so alternative technologies, such as LIGA (from the German acronym: lithographie, galvanik, abformung), gain importance [1].
The current International Technology Roadmap for Semiconductors (ITRS) requires that all defects ≥32nm on the EUV mask blank and ≥27nm on EUV substrates (i.e., mask blank before the multilayer [ML] coating) be removed by 2010.
We place cookies on your device to give you the best user experience. By using our websites, you agree to placement of these cookies and to our Privacy Policy. Please click here to accept.